cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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zynq-cc108.dts (1115B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Xilinx CC108 board DTS
      4 *
      5 * (C) Copyright 2007-2018 Xilinx, Inc.
      6 * (C) Copyright 2007-2013 Michal Simek
      7 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
      8 *
      9 * Michal SIMEK <monstr@monstr.eu>
     10 */
     11/dts-v1/;
     12/include/ "zynq-7000.dtsi"
     13
     14/ {
     15	model = "Xilinx CC108 board";
     16	compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
     17
     18	aliases {
     19		ethernet0 = &gem0;
     20		serial0 = &uart0;
     21	};
     22
     23	chosen {
     24		bootargs = "";
     25		stdout-path = "serial0:115200n8";
     26	};
     27
     28	memory@0 {
     29		device_type = "memory";
     30		reg = <0x0 0x20000000>;
     31	};
     32
     33	usb_phy0: phy0 {
     34		compatible = "usb-nop-xceiv";
     35		#phy-cells = <0>;
     36	};
     37
     38	usb_phy1: phy1 {
     39		compatible = "usb-nop-xceiv";
     40		#phy-cells = <0>;
     41	};
     42};
     43
     44&gem0 {
     45	status = "okay";
     46	phy-mode = "rgmii-id";
     47	phy-handle = <&ethernet_phy>;
     48
     49	ethernet_phy: ethernet-phy@1 {
     50		reg = <1>;
     51		device_type = "ethernet-phy";
     52	};
     53};
     54
     55&sdhci1 {
     56	status = "okay";
     57	broken-cd ;
     58	wp-inverted ;
     59};
     60
     61&uart0 {
     62	status = "okay";
     63};
     64
     65&usb0 {
     66	status = "okay";
     67	dr_mode = "host";
     68	usb-phy = <&usb_phy0>;
     69};
     70
     71&usb1 {
     72	status = "okay";
     73	dr_mode = "host";
     74	usb-phy = <&usb_phy1>;
     75};