zynq-parallella.dts (1504B)
1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2014 SUSE LINUX Products GmbH 4 * 5 * Derived from zynq-zed.dts: 6 * 7 * Copyright (C) 2011 Xilinx 8 * Copyright (C) 2012 National Instruments Corp. 9 * Copyright (C) 2013 Xilinx 10 */ 11/dts-v1/; 12/include/ "zynq-7000.dtsi" 13 14/ { 15 model = "Adapteva Parallella board"; 16 compatible = "adapteva,parallella", "xlnx,zynq-7000"; 17 18 aliases { 19 ethernet0 = &gem0; 20 serial0 = &uart1; 21 }; 22 23 memory@0 { 24 device_type = "memory"; 25 reg = <0x0 0x40000000>; 26 }; 27 28 chosen { 29 bootargs = "root=/dev/mmcblk0p2 rootfstype=ext4 rw rootwait"; 30 stdout-path = "serial0:115200n8"; 31 }; 32}; 33 34&clkc { 35 fclk-enable = <0xf>; 36 ps-clk-frequency = <33333333>; 37}; 38 39&gem0 { 40 status = "okay"; 41 phy-mode = "rgmii-id"; 42 phy-handle = <ðernet_phy>; 43 44 ethernet_phy: ethernet-phy@0 { 45 /* Marvell 88E1318 */ 46 compatible = "ethernet-phy-id0141.0e90", 47 "ethernet-phy-ieee802.3-c22"; 48 reg = <0>; 49 device_type = "ethernet-phy"; 50 marvell,reg-init = <0x3 0x10 0xff00 0x1e>, 51 <0x3 0x11 0xfff0 0xa>; 52 }; 53}; 54 55&i2c0 { 56 status = "okay"; 57 58 isl9305: isl9305@68 { 59 compatible = "isil,isl9305"; 60 reg = <0x68>; 61 62 regulators { 63 dcd1 { 64 regulator-name = "VDD_DSP"; 65 regulator-always-on; 66 }; 67 dcd2 { 68 regulator-name = "1P35V"; 69 regulator-always-on; 70 }; 71 ldo1 { 72 regulator-name = "VDD_ADJ"; 73 }; 74 ldo2 { 75 regulator-name = "VDD_GPIO"; 76 regulator-always-on; 77 }; 78 }; 79 }; 80}; 81 82&sdhci1 { 83 status = "okay"; 84}; 85 86&uart1 { 87 status = "okay"; 88};