cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cpufeature.h (1291B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (C) 2017 Linaro Ltd. <ard.biesheuvel@linaro.org>
      4 */
      5
      6#ifndef __ASM_CPUFEATURE_H
      7#define __ASM_CPUFEATURE_H
      8
      9#include <linux/log2.h>
     10#include <asm/hwcap.h>
     11
     12/*
     13 * Due to the fact that ELF_HWCAP is a 32-bit type on ARM, and given the number
     14 * of optional CPU features it defines, ARM's CPU hardware capability bits have
     15 * been distributed over separate elf_hwcap and elf_hwcap2 variables, each of
     16 * which covers a subset of the available CPU features.
     17 *
     18 * Currently, only a few of those are suitable for automatic module loading
     19 * (which is the primary use case of this facility) and those happen to be all
     20 * covered by HWCAP2. So let's only cover those via the cpu_feature()
     21 * convenience macro for now (which is used by module_cpu_feature_match()).
     22 * However, all capabilities are exposed via the modalias, and can be matched
     23 * using an explicit MODULE_DEVICE_TABLE() that uses __hwcap_feature() directly.
     24 */
     25#define MAX_CPU_FEATURES	64
     26#define __hwcap_feature(x)	ilog2(HWCAP_ ## x)
     27#define __hwcap2_feature(x)	(32 + ilog2(HWCAP2_ ## x))
     28#define cpu_feature(x)		__hwcap2_feature(x)
     29
     30static inline bool cpu_have_feature(unsigned int num)
     31{
     32	return num < 32 ? elf_hwcap & BIT(num) : elf_hwcap2 & BIT(num - 32);
     33}
     34
     35#endif