cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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smp.h (2886B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *  arch/arm/include/asm/smp.h
      4 *
      5 *  Copyright (C) 2004-2005 ARM Ltd.
      6 */
      7#ifndef __ASM_ARM_SMP_H
      8#define __ASM_ARM_SMP_H
      9
     10#include <linux/threads.h>
     11#include <linux/cpumask.h>
     12#include <linux/thread_info.h>
     13
     14#ifndef CONFIG_SMP
     15# error "<asm/smp.h> included in non-SMP build"
     16#endif
     17
     18#define raw_smp_processor_id() (current_thread_info()->cpu)
     19
     20struct seq_file;
     21
     22/*
     23 * generate IPI list text
     24 */
     25extern void show_ipi_list(struct seq_file *, int);
     26
     27/*
     28 * Called from C code, this handles an IPI.
     29 */
     30void handle_IPI(int ipinr, struct pt_regs *regs);
     31
     32/*
     33 * Setup the set of possible CPUs (via set_cpu_possible)
     34 */
     35extern void smp_init_cpus(void);
     36
     37/*
     38 * Register IPI interrupts with the arch SMP code
     39 */
     40extern void set_smp_ipi_range(int ipi_base, int nr_ipi);
     41
     42/*
     43 * Called from platform specific assembly code, this is the
     44 * secondary CPU entry point.
     45 */
     46asmlinkage void secondary_start_kernel(struct task_struct *task);
     47
     48
     49/*
     50 * Initial data for bringing up a secondary CPU.
     51 */
     52struct secondary_data {
     53	union {
     54		struct mpu_rgn_info *mpu_rgn_info;
     55		u64 pgdir;
     56	};
     57	unsigned long swapper_pg_dir;
     58	void *stack;
     59	struct task_struct *task;
     60};
     61extern struct secondary_data secondary_data;
     62extern void secondary_startup(void);
     63extern void secondary_startup_arm(void);
     64
     65extern int __cpu_disable(void);
     66
     67extern void __cpu_die(unsigned int cpu);
     68
     69extern void arch_send_call_function_single_ipi(int cpu);
     70extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
     71extern void arch_send_wakeup_ipi_mask(const struct cpumask *mask);
     72
     73extern int register_ipi_completion(struct completion *completion, int cpu);
     74
     75struct smp_operations {
     76#ifdef CONFIG_SMP
     77	/*
     78	 * Setup the set of possible CPUs (via set_cpu_possible)
     79	 */
     80	void (*smp_init_cpus)(void);
     81	/*
     82	 * Initialize cpu_possible map, and enable coherency
     83	 */
     84	void (*smp_prepare_cpus)(unsigned int max_cpus);
     85
     86	/*
     87	 * Perform platform specific initialisation of the specified CPU.
     88	 */
     89	void (*smp_secondary_init)(unsigned int cpu);
     90	/*
     91	 * Boot a secondary CPU, and assign it the specified idle task.
     92	 * This also gives us the initial stack to use for this CPU.
     93	 */
     94	int  (*smp_boot_secondary)(unsigned int cpu, struct task_struct *idle);
     95#ifdef CONFIG_HOTPLUG_CPU
     96	int  (*cpu_kill)(unsigned int cpu);
     97	void (*cpu_die)(unsigned int cpu);
     98	bool  (*cpu_can_disable)(unsigned int cpu);
     99	int  (*cpu_disable)(unsigned int cpu);
    100#endif
    101#endif
    102};
    103
    104struct of_cpu_method {
    105	const char *method;
    106	const struct smp_operations *ops;
    107};
    108
    109#define CPU_METHOD_OF_DECLARE(name, _method, _ops)			\
    110	static const struct of_cpu_method __cpu_method_of_table_##name	\
    111		__used __section("__cpu_method_of_table")		\
    112		= { .method = _method, .ops = _ops }
    113/*
    114 * set platform specific SMP operations
    115 */
    116extern void smp_set_ops(const struct smp_operations *);
    117
    118#endif /* ifndef __ASM_ARM_SMP_H */