cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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8250.S (1068B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * arch/arm/include/debug/8250.S
      4 *
      5 *  Copyright (C) 1994-2013 Russell King
      6 */
      7#include <linux/serial_reg.h>
      8
      9		.macro	addruart, rp, rv, tmp
     10		ldr	\rp, =CONFIG_DEBUG_UART_PHYS
     11		ldr	\rv, =CONFIG_DEBUG_UART_VIRT
     12		.endm
     13
     14#ifdef CONFIG_DEBUG_UART_8250_WORD
     15		.macro	store, rd, rx:vararg
     16	 ARM_BE8(rev \rd, \rd)
     17		str	\rd, \rx
     18	 ARM_BE8(rev \rd, \rd)
     19		.endm
     20
     21		.macro	load, rd, rx:vararg
     22		ldr	\rd, \rx
     23	ARM_BE8(rev \rd, \rd)
     24		.endm
     25#else
     26		.macro	store, rd, rx:vararg
     27		strb	\rd, \rx
     28		.endm
     29
     30		.macro	load, rd, rx:vararg
     31		ldrb	\rd, \rx
     32		.endm
     33#endif
     34
     35#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT
     36
     37		.macro	senduart,rd,rx
     38		store	\rd, [\rx, #UART_TX << UART_SHIFT]
     39		.endm
     40
     41		.macro	busyuart,rd,rx
     421002:		load	\rd, [\rx, #UART_LSR << UART_SHIFT]
     43		and	\rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
     44		teq	\rd, #UART_LSR_TEMT | UART_LSR_THRE
     45		bne	1002b
     46		.endm
     47
     48		.macro	waituarttxrdy,rd,rx
     49		.endm
     50
     51		.macro	waituartcts,rd,rx
     521001:		load	\rd, [\rx, #UART_MSR << UART_SHIFT]
     53		tst	\rd, #UART_MSR_CTS
     54		beq	1001b
     55		.endm