cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

samsung.S (1903B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright 2005, 2007 Simtec Electronics
      4 *	http://armlinux.simtec.co.uk/
      5 *	Ben Dooks <ben@simtec.co.uk>
      6 */
      7
      8#include <linux/serial_s3c.h>
      9
     10/* The S5PV210/S5PC110 implementations are as belows. */
     11
     12	.macro fifo_level_s5pv210 rd, rx
     13		ldr	\rd, [\rx, # S3C2410_UFSTAT]
     14ARM_BE8(rev \rd, \rd)
     15		and	\rd, \rd, #S5PV210_UFSTAT_TXMASK
     16	.endm
     17
     18	.macro  fifo_full_s5pv210 rd, rx
     19		ldr	\rd, [\rx, # S3C2410_UFSTAT]
     20ARM_BE8(rev \rd, \rd)
     21		tst	\rd, #S5PV210_UFSTAT_TXFULL
     22	.endm
     23
     24/* The S3C2440 implementations are used by default as they are the
     25 * most widely re-used */
     26
     27	.macro fifo_level_s3c2440 rd, rx
     28		ldr	\rd, [\rx, # S3C2410_UFSTAT]
     29ARM_BE8(rev \rd, \rd)
     30		and	\rd, \rd, #S3C2440_UFSTAT_TXMASK
     31	.endm
     32
     33#ifndef fifo_level
     34#define fifo_level fifo_level_s3c2440
     35#endif
     36
     37	.macro  fifo_full_s3c2440 rd, rx
     38		ldr	\rd, [\rx, # S3C2410_UFSTAT]
     39ARM_BE8(rev \rd, \rd)
     40		tst	\rd, #S3C2440_UFSTAT_TXFULL
     41	.endm
     42
     43#ifndef fifo_full
     44#define fifo_full fifo_full_s3c2440
     45#endif
     46
     47	.macro	senduart,rd,rx
     48		strb 	\rd, [\rx, # S3C2410_UTXH]
     49	.endm
     50
     51	.macro	busyuart, rd, rx
     52		ldr	\rd, [\rx, # S3C2410_UFCON]
     53ARM_BE8(rev \rd, \rd)
     54		tst	\rd, #S3C2410_UFCON_FIFOMODE	@ fifo enabled?
     55		beq	1001f				@
     56		@ FIFO enabled...
     571003:
     58		fifo_full \rd, \rx
     59		bne	1003b
     60		b	1002f
     61
     621001:
     63		@ busy waiting for non fifo
     64		ldr	\rd, [\rx, # S3C2410_UTRSTAT]
     65ARM_BE8(rev \rd, \rd)
     66		tst	\rd, #S3C2410_UTRSTAT_TXFE
     67		beq	1001b
     68
     691002:		@ exit busyuart
     70	.endm
     71
     72	.macro	waituartcts,rd,rx
     73	.endm
     74
     75	.macro	waituarttxrdy,rd,rx
     76		ldr	\rd, [\rx, # S3C2410_UFCON]
     77ARM_BE8(rev \rd, \rd)
     78		tst	\rd, #S3C2410_UFCON_FIFOMODE	@ fifo enabled?
     79		beq	1001f				@
     80		@ FIFO enabled...
     811003:
     82		fifo_level \rd, \rx
     83		teq	\rd, #0
     84		bne	1003b
     85		b	1002f
     861001:
     87		@ idle waiting for non fifo
     88		ldr	\rd, [\rx, # S3C2410_UTRSTAT]
     89ARM_BE8(rev \rd, \rd)
     90		tst	\rd, #S3C2410_UTRSTAT_TXFE
     91		beq	1001b
     92
     931002:		@ exit busyuart
     94	.endm