cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

stm32.S (1162B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (C) STMicroelectronics SA 2017 - All Rights Reserved
      4 * Author:   Gerald Baeza <gerald.baeza@st.com> for STMicroelectronics.
      5 */
      6
      7#ifdef CONFIG_STM32F4_DEBUG_UART
      8#define STM32_USART_SR_OFF		0x00
      9#define STM32_USART_TDR_OFF		0x04
     10#endif
     11
     12#if defined(CONFIG_STM32F7_DEBUG_UART) || defined(CONFIG_STM32H7_DEBUG_UART) || \
     13	defined(CONFIG_STM32MP1_DEBUG_UART)
     14#define STM32_USART_SR_OFF		0x1C
     15#define STM32_USART_TDR_OFF		0x28
     16#endif
     17
     18#define STM32_USART_TC			(1 << 6)	/* Tx complete       */
     19#define STM32_USART_TXE			(1 << 7)	/* Tx data reg empty */
     20
     21.macro	addruart, rp, rv, tmp
     22	ldr	\rp, =CONFIG_DEBUG_UART_PHYS @ physical base
     23	ldr	\rv, =CONFIG_DEBUG_UART_VIRT @ virt base
     24.endm
     25
     26.macro  senduart,rd,rx
     27	strb    \rd, [\rx, #STM32_USART_TDR_OFF]
     28.endm
     29
     30.macro	waituartcts,rd,rx
     31.endm
     32
     33.macro  waituarttxrdy,rd,rx
     341001:	ldr	\rd, [\rx, #(STM32_USART_SR_OFF)]	@ Read Status Register
     35	tst	\rd, #STM32_USART_TXE			@ TXE = 1 = tx empty
     36	beq	1001b
     37.endm
     38
     39.macro  busyuart,rd,rx
     401001:	ldr	\rd, [\rx, #(STM32_USART_SR_OFF)]	@ Read Status Register
     41	tst	\rd, #STM32_USART_TC			@ TC = 1 = tx complete
     42	beq	1001b
     43.endm