cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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vmlinux-xip.lds.S (4815B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/* ld script to make ARM Linux kernel
      3 * taken from the i386 version by Russell King
      4 * Written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
      5 */
      6
      7/* No __ro_after_init data in the .rodata section - which will always be ro */
      8#define RO_AFTER_INIT_DATA
      9
     10#include <linux/sizes.h>
     11
     12#include <asm/vmlinux.lds.h>
     13#include <asm/cache.h>
     14#include <asm/thread_info.h>
     15#include <asm/memory.h>
     16#include <asm/mpu.h>
     17#include <asm/page.h>
     18
     19OUTPUT_ARCH(arm)
     20ENTRY(stext)
     21
     22#ifndef __ARMEB__
     23jiffies = jiffies_64;
     24#else
     25jiffies = jiffies_64 + 4;
     26#endif
     27
     28SECTIONS
     29{
     30	/*
     31	 * XXX: The linker does not define how output sections are
     32	 * assigned to input sections when there are multiple statements
     33	 * matching the same input section name.  There is no documented
     34	 * order of matching.
     35	 *
     36	 * unwind exit sections must be discarded before the rest of the
     37	 * unwind sections get included.
     38	 */
     39	/DISCARD/ : {
     40		ARM_DISCARD
     41		*(.alt.smp.init)
     42		*(.pv_table)
     43#ifndef CONFIG_ARM_UNWIND
     44		*(.ARM.exidx) *(.ARM.exidx.*)
     45		*(.ARM.extab) *(.ARM.extab.*)
     46#endif
     47	}
     48
     49	. = XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR);
     50	_xiprom = .;			/* XIP ROM area to be mapped */
     51
     52	.head.text : {
     53		_text = .;
     54		HEAD_TEXT
     55	}
     56
     57	.text : {			/* Real text segment		*/
     58		_stext = .;		/* Text and read-only data	*/
     59		ARM_TEXT
     60	}
     61
     62	RO_DATA(PAGE_SIZE)
     63
     64	. = ALIGN(4);
     65	__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
     66		__start___ex_table = .;
     67		ARM_MMU_KEEP(*(__ex_table))
     68		__stop___ex_table = .;
     69	}
     70
     71#ifdef CONFIG_ARM_UNWIND
     72	ARM_UNWIND_SECTIONS
     73#endif
     74
     75	_etext = .;			/* End of text and rodata section */
     76
     77	ARM_VECTORS
     78	INIT_TEXT_SECTION(8)
     79	.exit.text : {
     80		ARM_EXIT_KEEP(EXIT_TEXT)
     81	}
     82	.init.proc.info : {
     83		ARM_CPU_DISCARD(PROC_INFO)
     84	}
     85	.init.arch.info : {
     86		__arch_info_begin = .;
     87		*(.arch.info.init)
     88		__arch_info_end = .;
     89	}
     90	.init.tagtable : {
     91		__tagtable_begin = .;
     92		*(.taglist.init)
     93		__tagtable_end = .;
     94	}
     95	.init.rodata : {
     96		INIT_SETUP(16)
     97		INIT_CALLS
     98		CON_INITCALL
     99		INIT_RAM_FS
    100	}
    101
    102#ifdef CONFIG_ARM_MPU
    103	. = ALIGN(SZ_128K);
    104#endif
    105	_exiprom = .;			/* End of XIP ROM area */
    106
    107/*
    108 * From this point, stuff is considered writable and will be copied to RAM
    109 */
    110	__data_loc = ALIGN(4);		/* location in file */
    111	. = PAGE_OFFSET + TEXT_OFFSET;	/* location in memory */
    112#undef LOAD_OFFSET
    113#define LOAD_OFFSET (PAGE_OFFSET + TEXT_OFFSET - __data_loc)
    114
    115	. = ALIGN(THREAD_SIZE);
    116	_sdata = .;
    117	RW_DATA(L1_CACHE_BYTES, PAGE_SIZE, THREAD_SIZE)
    118	.data.ro_after_init : AT(ADDR(.data.ro_after_init) - LOAD_OFFSET) {
    119		*(.data..ro_after_init)
    120	}
    121	_edata = .;
    122
    123	. = ALIGN(PAGE_SIZE);
    124	__init_begin = .;
    125	.init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
    126		INIT_DATA
    127	}
    128	.exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
    129		ARM_EXIT_KEEP(EXIT_DATA)
    130	}
    131#ifdef CONFIG_SMP
    132	PERCPU_SECTION(L1_CACHE_BYTES)
    133#endif
    134
    135#ifdef CONFIG_HAVE_TCM
    136	ARM_TCM
    137#endif
    138
    139	/*
    140	 * End of copied data. We need a dummy section to get its LMA.
    141	 * Also located before final ALIGN() as trailing padding is not stored
    142	 * in the resulting binary file and useless to copy.
    143	 */
    144	.data.endmark : AT(ADDR(.data.endmark) - LOAD_OFFSET) { }
    145	_edata_loc = LOADADDR(.data.endmark);
    146
    147	. = ALIGN(PAGE_SIZE);
    148	__init_end = .;
    149
    150	BSS_SECTION(0, 0, 8)
    151#ifdef CONFIG_ARM_MPU
    152	. = ALIGN(PMSAv8_MINALIGN);
    153#endif
    154	_end = .;
    155
    156	STABS_DEBUG
    157	DWARF_DEBUG
    158	ARM_DETAILS
    159
    160	ARM_ASSERTS
    161}
    162
    163/*
    164 * These must never be empty
    165 * If you have to comment these two assert statements out, your
    166 * binutils is too old (for other reasons as well)
    167 */
    168ASSERT((__proc_info_end - __proc_info_begin), "missing CPU support")
    169#ifndef CONFIG_COMPILE_TEST
    170ASSERT((__arch_info_end - __arch_info_begin), "no machine record defined")
    171#endif
    172
    173#ifdef CONFIG_XIP_DEFLATED_DATA
    174/*
    175 * The .bss is used as a stack area for __inflate_kernel_data() whose stack
    176 * frame is 9568 bytes. Make sure it has extra room left.
    177 */
    178ASSERT((_end - __bss_start) >= 12288, ".bss too small for CONFIG_XIP_DEFLATED_DATA")
    179#endif
    180
    181#if defined(CONFIG_ARM_MPU) && !defined(CONFIG_COMPILE_TEST)
    182/*
    183 * Due to PMSAv7 restriction on base address and size we have to
    184 * enforce minimal alignment restrictions. It was seen that weaker
    185 * alignment restriction on _xiprom will likely force XIP address
    186 * space spawns multiple MPU regions thus it is likely we run in
    187 * situation when we are reprogramming MPU region we run on with
    188 * something which doesn't cover reprogramming code itself, so as soon
    189 * as we update MPU settings we'd immediately try to execute straight
    190 * from background region which is XN.
    191 * It seem that alignment in 1M should suit most users.
    192 * _exiprom is aligned as 1/8 of 1M so can be covered by subregion
    193 * disable
    194 */
    195ASSERT(!(_xiprom & (SZ_1M - 1)), "XIP start address may cause MPU programming issues")
    196ASSERT(!(_exiprom & (SZ_128K - 1)), "XIP end address may cause MPU programming issues")
    197#endif