cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bcm_5301x.c (1276B)

      1/*
      2 * Broadcom BCM470X / BCM5301X ARM platform code.
      3 *
      4 * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
      5 *
      6 * Licensed under the GNU/GPL. See COPYING for details.
      7 */
      8#include <linux/of_platform.h>
      9#include <asm/hardware/cache-l2x0.h>
     10
     11#include <asm/mach/arch.h>
     12#include <asm/siginfo.h>
     13#include <asm/signal.h>
     14
     15#define FSR_EXTERNAL		(1 << 12)
     16#define FSR_READ		(0 << 10)
     17#define FSR_IMPRECISE		0x0406
     18
     19static const char *const bcm5301x_dt_compat[] __initconst = {
     20	"brcm,bcm4708",
     21	NULL,
     22};
     23
     24static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
     25				  struct pt_regs *regs)
     26{
     27	/*
     28	 * We want to ignore aborts forwarded from the PCIe bus that are
     29	 * expected and shouldn't really be passed by the PCIe controller.
     30	 * The biggest disadvantage is the same FSR code may be reported when
     31	 * reading non-existing APB register and we shouldn't ignore that.
     32	 */
     33	if (fsr == (FSR_EXTERNAL | FSR_READ | FSR_IMPRECISE))
     34		return 0;
     35
     36	return 1;
     37}
     38
     39static void __init bcm5301x_init_early(void)
     40{
     41	hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, BUS_OBJERR,
     42			"imprecise external abort");
     43}
     44
     45DT_MACHINE_START(BCM5301X, "BCM5301X")
     46	.l2c_aux_val	= 0,
     47	.l2c_aux_mask	= ~0,
     48	.dt_compat	= bcm5301x_dt_compat,
     49	.init_early	= bcm5301x_init_early,
     50MACHINE_END