cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

common.h (2023B)


      1/*
      2 * Header for code common to all DaVinci machines.
      3 *
      4 * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
      5 *
      6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
      7 * the terms of the GNU General Public License version 2. This program
      8 * is licensed "as is" without any warranty of any kind, whether express
      9 * or implied.
     10 */
     11
     12#ifndef __ARCH_ARM_MACH_DAVINCI_COMMON_H
     13#define __ARCH_ARM_MACH_DAVINCI_COMMON_H
     14
     15#include <linux/clk.h>
     16#include <linux/compiler.h>
     17#include <linux/types.h>
     18#include <linux/reboot.h>
     19
     20#include <asm/irq.h>
     21
     22#define DAVINCI_INTC_START		NR_IRQS
     23#define DAVINCI_INTC_IRQ(_irqnum)	(DAVINCI_INTC_START + (_irqnum))
     24
     25struct davinci_gpio_controller;
     26
     27/*
     28 * SoC info passed into common davinci modules.
     29 *
     30 * Base addresses in this structure should be physical and not virtual.
     31 * Modules that take such base addresses, should internally ioremap() them to
     32 * use.
     33 */
     34struct davinci_soc_info {
     35	struct map_desc			*io_desc;
     36	unsigned long			io_desc_num;
     37	u32				cpu_id;
     38	u32				jtag_id;
     39	u32				jtag_id_reg;
     40	struct davinci_id		*ids;
     41	unsigned long			ids_num;
     42	u32				pinmux_base;
     43	const struct mux_config		*pinmux_pins;
     44	unsigned long			pinmux_pins_num;
     45	int				gpio_type;
     46	u32				gpio_base;
     47	unsigned			gpio_num;
     48	unsigned			gpio_irq;
     49	unsigned			gpio_unbanked;
     50	struct davinci_gpio_controller	*gpio_ctlrs;
     51	int				gpio_ctlrs_num;
     52	struct emac_platform_data	*emac_pdata;
     53	dma_addr_t			sram_dma;
     54	unsigned			sram_len;
     55};
     56
     57extern struct davinci_soc_info davinci_soc_info;
     58
     59extern void davinci_common_init(const struct davinci_soc_info *soc_info);
     60extern void davinci_init_ide(void);
     61void davinci_init_late(void);
     62
     63#ifdef CONFIG_CPU_FREQ
     64int davinci_cpufreq_init(void);
     65#else
     66static inline int davinci_cpufreq_init(void) { return 0; }
     67#endif
     68
     69#ifdef CONFIG_SUSPEND
     70int davinci_pm_init(void);
     71#else
     72static inline int davinci_pm_init(void) { return 0; }
     73#endif
     74
     75void __init pdata_quirks_init(void);
     76
     77#define SRAM_SIZE	SZ_128K
     78
     79#endif /* __ARCH_ARM_MACH_DAVINCI_COMMON_H */