cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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da8xx.h (6093B)


      1/*
      2 * Chip specific defines for DA8XX/OMAP L1XX SoC
      3 *
      4 * Author: Mark A. Greer <mgreer@mvista.com>
      5 *
      6 * 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
      7 * the terms of the GNU General Public License version 2. This program
      8 * is licensed "as is" without any warranty of any kind, whether express
      9 * or implied.
     10 */
     11#ifndef __ASM_ARCH_DAVINCI_DA8XX_H
     12#define __ASM_ARCH_DAVINCI_DA8XX_H
     13
     14#include <video/da8xx-fb.h>
     15
     16#include <linux/platform_device.h>
     17#include <linux/davinci_emac.h>
     18#include <linux/spi/spi.h>
     19#include <linux/platform_data/davinci_asp.h>
     20#include <linux/reboot.h>
     21#include <linux/regmap.h>
     22#include <linux/videodev2.h>
     23
     24#include "serial.h"
     25#include "pm.h"
     26
     27#include <linux/platform_data/edma.h>
     28#include <linux/platform_data/i2c-davinci.h>
     29#include <linux/platform_data/mmc-davinci.h>
     30#include <linux/platform_data/usb-davinci.h>
     31#include <linux/platform_data/spi-davinci.h>
     32#include <linux/platform_data/uio_pruss.h>
     33
     34#include <media/davinci/vpif_types.h>
     35
     36extern void __iomem *da8xx_syscfg0_base;
     37extern void __iomem *da8xx_syscfg1_base;
     38
     39/*
     40 * If the DA850/OMAP-L138/AM18x SoC on board is of a higher speed grade
     41 * (than the regular 300MHz variant), the board code should set this up
     42 * with the supported speed before calling da850_register_cpufreq().
     43 */
     44extern unsigned int da850_max_speed;
     45
     46/*
     47 * The cp_intc interrupt controller for the da8xx isn't in the same
     48 * chunk of physical memory space as the other registers (like it is
     49 * on the davincis) so it needs to be mapped separately.  It will be
     50 * mapped early on when the I/O space is mapped and we'll put it just
     51 * before the I/O space in the processor's virtual memory space.
     52 */
     53#define DA8XX_CP_INTC_BASE	0xfffee000
     54#define DA8XX_CP_INTC_SIZE	SZ_8K
     55#define DA8XX_CP_INTC_VIRT	(IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K)
     56
     57#define DA8XX_SYSCFG0_BASE	(IO_PHYS + 0x14000)
     58#define DA8XX_SYSCFG0_VIRT(x)	(da8xx_syscfg0_base + (x))
     59#define DA8XX_JTAG_ID_REG	0x18
     60#define DA8XX_HOST1CFG_REG	0x44
     61#define DA8XX_CHIPSIG_REG	0x174
     62#define DA8XX_CFGCHIP0_REG	0x17c
     63#define DA8XX_CFGCHIP1_REG	0x180
     64#define DA8XX_CFGCHIP2_REG	0x184
     65#define DA8XX_CFGCHIP3_REG	0x188
     66#define DA8XX_CFGCHIP4_REG	0x18c
     67
     68#define DA8XX_SYSCFG1_BASE	(IO_PHYS + 0x22C000)
     69#define DA8XX_SYSCFG1_VIRT(x)	(da8xx_syscfg1_base + (x))
     70#define DA8XX_DEEPSLEEP_REG	0x8
     71#define DA8XX_PWRDN_REG		0x18
     72
     73#define DA8XX_PSC0_BASE		0x01c10000
     74#define DA8XX_PLL0_BASE		0x01c11000
     75#define DA8XX_TIMER64P0_BASE	0x01c20000
     76#define DA8XX_TIMER64P1_BASE	0x01c21000
     77#define DA8XX_VPIF_BASE		0x01e17000
     78#define DA8XX_GPIO_BASE		0x01e26000
     79#define DA8XX_PSC1_BASE		0x01e27000
     80
     81#define DA8XX_DSP_L2_RAM_BASE	0x11800000
     82#define DA8XX_DSP_L1P_RAM_BASE	(DA8XX_DSP_L2_RAM_BASE + 0x600000)
     83#define DA8XX_DSP_L1D_RAM_BASE	(DA8XX_DSP_L2_RAM_BASE + 0x700000)
     84
     85#define DA8XX_AEMIF_CS2_BASE	0x60000000
     86#define DA8XX_AEMIF_CS3_BASE	0x62000000
     87#define DA8XX_AEMIF_CTL_BASE	0x68000000
     88#define DA8XX_SHARED_RAM_BASE	0x80000000
     89#define DA8XX_ARM_RAM_BASE	0xffff0000
     90
     91void da830_init(void);
     92void da830_init_irq(void);
     93void da830_init_time(void);
     94void da830_register_clocks(void);
     95
     96void da850_init(void);
     97void da850_init_irq(void);
     98void da850_init_time(void);
     99void da850_register_clocks(void);
    100
    101int da830_register_edma(struct edma_rsv_info *rsv);
    102int da850_register_edma(struct edma_rsv_info *rsv[2]);
    103int da8xx_register_i2c(int instance, struct davinci_i2c_platform_data *pdata);
    104int da8xx_register_spi_bus(int instance, unsigned num_chipselect);
    105int da8xx_register_watchdog(void);
    106int da8xx_register_usb_phy(void);
    107int da8xx_register_usb20(unsigned mA, unsigned potpgt);
    108int da8xx_register_usb11(struct da8xx_ohci_root_hub *pdata);
    109int da8xx_register_usb_phy_clocks(void);
    110int da850_register_sata_refclk(int rate);
    111int da8xx_register_emac(void);
    112int da8xx_register_uio_pruss(void);
    113int da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata);
    114int da8xx_register_mmcsd0(struct davinci_mmc_config *config);
    115int da850_register_mmcsd1(struct davinci_mmc_config *config);
    116void da8xx_register_mcasp(int id, struct snd_platform_data *pdata);
    117int da8xx_register_rtc(void);
    118int da8xx_register_gpio(void *pdata);
    119int da850_register_cpufreq(char *async_clk);
    120int da8xx_register_cpuidle(void);
    121void __iomem *da8xx_get_mem_ctlr(void);
    122int da850_register_sata(unsigned long refclkpn);
    123int da850_register_vpif(void);
    124int da850_register_vpif_display
    125			(struct vpif_display_config *display_config);
    126int da850_register_vpif_capture
    127			(struct vpif_capture_config *capture_config);
    128void da8xx_rproc_reserve_cma(void);
    129int da8xx_register_rproc(void);
    130int da850_register_gpio(void);
    131int da830_register_gpio(void);
    132struct regmap *da8xx_get_cfgchip(void);
    133
    134extern struct platform_device da8xx_serial_device[];
    135extern struct emac_platform_data da8xx_emac_pdata;
    136extern struct da8xx_lcdc_platform_data sharp_lcd035q3dg01_pdata;
    137extern struct da8xx_lcdc_platform_data sharp_lk043t1dg01_pdata;
    138
    139
    140extern const short da830_emif25_pins[];
    141extern const short da830_spi0_pins[];
    142extern const short da830_spi1_pins[];
    143extern const short da830_mmc_sd_pins[];
    144extern const short da830_uart0_pins[];
    145extern const short da830_uart1_pins[];
    146extern const short da830_uart2_pins[];
    147extern const short da830_usb20_pins[];
    148extern const short da830_usb11_pins[];
    149extern const short da830_uhpi_pins[];
    150extern const short da830_cpgmac_pins[];
    151extern const short da830_emif3c_pins[];
    152extern const short da830_mcasp0_pins[];
    153extern const short da830_mcasp1_pins[];
    154extern const short da830_mcasp2_pins[];
    155extern const short da830_i2c0_pins[];
    156extern const short da830_i2c1_pins[];
    157extern const short da830_lcdcntl_pins[];
    158extern const short da830_pwm_pins[];
    159extern const short da830_ecap0_pins[];
    160extern const short da830_ecap1_pins[];
    161extern const short da830_ecap2_pins[];
    162extern const short da830_eqep0_pins[];
    163extern const short da830_eqep1_pins[];
    164extern const short da850_vpif_capture_pins[];
    165extern const short da850_vpif_display_pins[];
    166
    167extern const short da850_i2c0_pins[];
    168extern const short da850_i2c1_pins[];
    169extern const short da850_lcdcntl_pins[];
    170
    171#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */