devices.c (7473B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * mach-davinci/devices.c 4 * 5 * DaVinci platform device setup/initialization 6 */ 7 8#include <linux/init.h> 9#include <linux/platform_device.h> 10#include <linux/platform_data/i2c-davinci.h> 11#include <linux/platform_data/mmc-davinci.h> 12#include <linux/platform_data/edma.h> 13#include <linux/dma-mapping.h> 14#include <linux/io.h> 15#include <linux/reboot.h> 16 17#include "hardware.h" 18#include "cputype.h" 19#include "mux.h" 20#include "davinci.h" 21#include "irqs.h" 22 23#define DAVINCI_I2C_BASE 0x01C21000 24#define DAVINCI_ATA_BASE 0x01C66000 25#define DAVINCI_MMCSD0_BASE 0x01E10000 26#define DM355_MMCSD0_BASE 0x01E11000 27#define DM355_MMCSD1_BASE 0x01E00000 28#define DM365_MMCSD0_BASE 0x01D11000 29#define DM365_MMCSD1_BASE 0x01D00000 30 31void __iomem *davinci_sysmod_base; 32 33void davinci_map_sysmod(void) 34{ 35 davinci_sysmod_base = ioremap(DAVINCI_SYSTEM_MODULE_BASE, 36 0x800); 37 /* 38 * Throw a bug since a lot of board initialization code depends 39 * on system module availability. ioremap() failing this early 40 * need careful looking into anyway. 41 */ 42 BUG_ON(!davinci_sysmod_base); 43} 44 45static struct resource i2c_resources[] = { 46 { 47 .start = DAVINCI_I2C_BASE, 48 .end = DAVINCI_I2C_BASE + 0x40, 49 .flags = IORESOURCE_MEM, 50 }, 51 { 52 .start = DAVINCI_INTC_IRQ(IRQ_I2C), 53 .flags = IORESOURCE_IRQ, 54 }, 55}; 56 57static struct platform_device davinci_i2c_device = { 58 .name = "i2c_davinci", 59 .id = 1, 60 .num_resources = ARRAY_SIZE(i2c_resources), 61 .resource = i2c_resources, 62}; 63 64void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata) 65{ 66 if (cpu_is_davinci_dm644x()) 67 davinci_cfg_reg(DM644X_I2C); 68 69 davinci_i2c_device.dev.platform_data = pdata; 70 (void) platform_device_register(&davinci_i2c_device); 71} 72 73static struct resource ide_resources[] = { 74 { 75 .start = DAVINCI_ATA_BASE, 76 .end = DAVINCI_ATA_BASE + 0x7ff, 77 .flags = IORESOURCE_MEM, 78 }, 79 { 80 .start = DAVINCI_INTC_IRQ(IRQ_IDE), 81 .end = DAVINCI_INTC_IRQ(IRQ_IDE), 82 .flags = IORESOURCE_IRQ, 83 }, 84}; 85 86static u64 ide_dma_mask = DMA_BIT_MASK(32); 87 88static struct platform_device ide_device = { 89 .name = "palm_bk3710", 90 .id = -1, 91 .resource = ide_resources, 92 .num_resources = ARRAY_SIZE(ide_resources), 93 .dev = { 94 .dma_mask = &ide_dma_mask, 95 .coherent_dma_mask = DMA_BIT_MASK(32), 96 }, 97}; 98 99void __init davinci_init_ide(void) 100{ 101 if (cpu_is_davinci_dm644x()) { 102 davinci_cfg_reg(DM644X_HPIEN_DISABLE); 103 davinci_cfg_reg(DM644X_ATAEN); 104 davinci_cfg_reg(DM644X_HDIREN); 105 } else if (cpu_is_davinci_dm646x()) { 106 /* IRQ_DM646X_IDE is the same as IRQ_IDE */ 107 davinci_cfg_reg(DM646X_ATAEN); 108 } else { 109 WARN_ON(1); 110 return; 111 } 112 113 platform_device_register(&ide_device); 114} 115 116#if IS_ENABLED(CONFIG_MMC_DAVINCI) 117 118static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); 119 120static struct resource mmcsd0_resources[] = { 121 { 122 /* different on dm355 */ 123 .start = DAVINCI_MMCSD0_BASE, 124 .end = DAVINCI_MMCSD0_BASE + SZ_4K - 1, 125 .flags = IORESOURCE_MEM, 126 }, 127 /* IRQs: MMC/SD, then SDIO */ 128 { 129 .start = DAVINCI_INTC_IRQ(IRQ_MMCINT), 130 .flags = IORESOURCE_IRQ, 131 }, { 132 /* different on dm355 */ 133 .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT), 134 .flags = IORESOURCE_IRQ, 135 }, 136}; 137 138static struct platform_device davinci_mmcsd0_device = { 139 .name = "dm6441-mmc", 140 .id = 0, 141 .dev = { 142 .dma_mask = &mmcsd0_dma_mask, 143 .coherent_dma_mask = DMA_BIT_MASK(32), 144 }, 145 .num_resources = ARRAY_SIZE(mmcsd0_resources), 146 .resource = mmcsd0_resources, 147}; 148 149static u64 mmcsd1_dma_mask = DMA_BIT_MASK(32); 150 151static struct resource mmcsd1_resources[] = { 152 { 153 .start = DM355_MMCSD1_BASE, 154 .end = DM355_MMCSD1_BASE + SZ_4K - 1, 155 .flags = IORESOURCE_MEM, 156 }, 157 /* IRQs: MMC/SD, then SDIO */ 158 { 159 .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1), 160 .flags = IORESOURCE_IRQ, 161 }, { 162 .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1), 163 .flags = IORESOURCE_IRQ, 164 }, 165}; 166 167static struct platform_device davinci_mmcsd1_device = { 168 .name = "dm6441-mmc", 169 .id = 1, 170 .dev = { 171 .dma_mask = &mmcsd1_dma_mask, 172 .coherent_dma_mask = DMA_BIT_MASK(32), 173 }, 174 .num_resources = ARRAY_SIZE(mmcsd1_resources), 175 .resource = mmcsd1_resources, 176}; 177 178 179void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) 180{ 181 struct platform_device *pdev = NULL; 182 183 if (WARN_ON(cpu_is_davinci_dm646x())) 184 return; 185 186 /* REVISIT: update PINMUX, ARM_IRQMUX, and EDMA_EVTMUX here too; 187 * for example if MMCSD1 is used for SDIO, maybe DAT2 is unused. 188 * 189 * FIXME dm6441 (no MMC/SD), dm357 (one), and dm335 (two) are 190 * not handled right here ... 191 */ 192 switch (module) { 193 case 1: 194 if (cpu_is_davinci_dm355()) { 195 /* REVISIT we may not need all these pins if e.g. this 196 * is a hard-wired SDIO device... 197 */ 198 davinci_cfg_reg(DM355_SD1_CMD); 199 davinci_cfg_reg(DM355_SD1_CLK); 200 davinci_cfg_reg(DM355_SD1_DATA0); 201 davinci_cfg_reg(DM355_SD1_DATA1); 202 davinci_cfg_reg(DM355_SD1_DATA2); 203 davinci_cfg_reg(DM355_SD1_DATA3); 204 } else if (cpu_is_davinci_dm365()) { 205 /* Configure pull down control */ 206 unsigned v; 207 208 v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); 209 __raw_writel(v & ~0xfc0, 210 DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1)); 211 212 mmcsd1_resources[0].start = DM365_MMCSD1_BASE; 213 mmcsd1_resources[0].end = DM365_MMCSD1_BASE + 214 SZ_4K - 1; 215 mmcsd1_resources[2].start = DAVINCI_INTC_IRQ( 216 IRQ_DM365_SDIOINT1); 217 davinci_mmcsd1_device.name = "da830-mmc"; 218 } else 219 break; 220 221 pdev = &davinci_mmcsd1_device; 222 break; 223 case 0: 224 if (cpu_is_davinci_dm355()) { 225 mmcsd0_resources[0].start = DM355_MMCSD0_BASE; 226 mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1; 227 mmcsd0_resources[2].start = DAVINCI_INTC_IRQ( 228 IRQ_DM355_SDIOINT0); 229 230 /* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */ 231 davinci_cfg_reg(DM355_MMCSD0); 232 233 /* enable RX EDMA */ 234 davinci_cfg_reg(DM355_EVT26_MMC0_RX); 235 } else if (cpu_is_davinci_dm365()) { 236 mmcsd0_resources[0].start = DM365_MMCSD0_BASE; 237 mmcsd0_resources[0].end = DM365_MMCSD0_BASE + 238 SZ_4K - 1; 239 mmcsd0_resources[2].start = DAVINCI_INTC_IRQ( 240 IRQ_DM365_SDIOINT0); 241 davinci_mmcsd0_device.name = "da830-mmc"; 242 } else if (cpu_is_davinci_dm644x()) { 243 /* REVISIT: should this be in board-init code? */ 244 /* Power-on 3.3V IO cells */ 245 __raw_writel(0, 246 DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN)); 247 /*Set up the pull regiter for MMC */ 248 davinci_cfg_reg(DM644X_MSTK); 249 } 250 251 pdev = &davinci_mmcsd0_device; 252 break; 253 } 254 255 if (WARN_ON(!pdev)) 256 return; 257 258 pdev->dev.platform_data = config; 259 platform_device_register(pdev); 260} 261 262#else 263 264void __init davinci_setup_mmc(int module, struct davinci_mmc_config *config) 265{ 266} 267 268#endif 269 270/*-------------------------------------------------------------------------*/ 271 272static struct resource wdt_resources[] = { 273 { 274 .start = DAVINCI_WDOG_BASE, 275 .end = DAVINCI_WDOG_BASE + SZ_1K - 1, 276 .flags = IORESOURCE_MEM, 277 }, 278}; 279 280static struct platform_device davinci_wdt_device = { 281 .name = "davinci-wdt", 282 .id = -1, 283 .num_resources = ARRAY_SIZE(wdt_resources), 284 .resource = wdt_resources, 285}; 286 287int davinci_init_wdt(void) 288{ 289 return platform_device_register(&davinci_wdt_device); 290} 291 292static struct platform_device davinci_gpio_device = { 293 .name = "davinci_gpio", 294 .id = -1, 295}; 296 297int davinci_gpio_register(struct resource *res, int size, void *pdata) 298{ 299 davinci_gpio_device.resource = res; 300 davinci_gpio_device.num_resources = size; 301 davinci_gpio_device.dev.platform_data = pdata; 302 return platform_device_register(&davinci_gpio_device); 303}