cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hardware.h (1022B)

      1/*
      2 * Hardware definitions common to all DaVinci family processors
      3 *
      4 * Author: Kevin Hilman, Deep Root Systems, LLC
      5 *
      6 * 2007 (c) Deep Root Systems, LLC. This file is licensed under
      7 * the terms of the GNU General Public License version 2. This program
      8 * is licensed "as is" without any warranty of any kind, whether express
      9 * or implied.
     10 */
     11#ifndef __ASM_ARCH_HARDWARE_H
     12#define __ASM_ARCH_HARDWARE_H
     13
     14/*
     15 * Before you add anything to ths file:
     16 *
     17 * This header is for defines common to ALL DaVinci family chips.
     18 * Anything that is chip specific should go in <chipname>.h,
     19 * and the chip/board init code should then explicitly include
     20 * <chipname>.h
     21 */
     22/*
     23 * I/O mapping
     24 */
     25#define IO_PHYS				UL(0x01c00000)
     26#define IO_OFFSET			0xfd000000 /* Virtual IO = 0xfec00000 */
     27#define IO_SIZE				0x00400000
     28#define IO_VIRT				(IO_PHYS + IO_OFFSET)
     29#define io_v2p(va)			((va) - IO_OFFSET)
     30#define __IO_ADDRESS(x)			((x) + IO_OFFSET)
     31#define IO_ADDRESS(pa)			IOMEM(__IO_ADDRESS(pa))
     32
     33#endif /* __ASM_ARCH_HARDWARE_H */