cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

irq.c (1821B)

      1/*
      2 * arch/arm/mach-dove/irq.c
      3 *
      4 * Dove IRQ handling.
      5 *
      6 * This file is licensed under the terms of the GNU General Public
      7 * License version 2.  This program is licensed "as is" without any
      8 * warranty of any kind, whether express or implied.
      9 */
     10#include <linux/init.h>
     11#include <linux/irq.h>
     12#include <linux/io.h>
     13#include <asm/exception.h>
     14
     15#include <plat/irq.h>
     16#include <plat/orion-gpio.h>
     17
     18#include "pm.h"
     19#include "bridge-regs.h"
     20#include "common.h"
     21
     22static int __initdata gpio0_irqs[4] = {
     23	IRQ_DOVE_GPIO_0_7,
     24	IRQ_DOVE_GPIO_8_15,
     25	IRQ_DOVE_GPIO_16_23,
     26	IRQ_DOVE_GPIO_24_31,
     27};
     28
     29static int __initdata gpio1_irqs[4] = {
     30	IRQ_DOVE_HIGH_GPIO,
     31	0,
     32	0,
     33	0,
     34};
     35
     36static int __initdata gpio2_irqs[4] = {
     37	0,
     38	0,
     39	0,
     40	0,
     41};
     42
     43static void __iomem *dove_irq_base = IRQ_VIRT_BASE;
     44
     45static asmlinkage void
     46__exception_irq_entry dove_legacy_handle_irq(struct pt_regs *regs)
     47{
     48	u32 stat;
     49
     50	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_LOW_OFF);
     51	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_LOW_OFF);
     52	if (stat) {
     53		unsigned int hwirq = 1 + __fls(stat);
     54		handle_IRQ(hwirq, regs);
     55		return;
     56	}
     57	stat = readl_relaxed(dove_irq_base + IRQ_CAUSE_HIGH_OFF);
     58	stat &= readl_relaxed(dove_irq_base + IRQ_MASK_HIGH_OFF);
     59	if (stat) {
     60		unsigned int hwirq = 33 + __fls(stat);
     61		handle_IRQ(hwirq, regs);
     62		return;
     63	}
     64}
     65
     66void __init dove_init_irq(void)
     67{
     68	orion_irq_init(1, IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF);
     69	orion_irq_init(33, IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF);
     70
     71	set_handle_irq(dove_legacy_handle_irq);
     72
     73	/*
     74	 * Initialize gpiolib for GPIOs 0-71.
     75	 */
     76	orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0,
     77			IRQ_DOVE_GPIO_START, gpio0_irqs);
     78
     79	orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0,
     80			IRQ_DOVE_GPIO_START + 32, gpio1_irqs);
     81
     82	orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0,
     83			IRQ_DOVE_GPIO_START + 64, gpio2_irqs);
     84}