core.c (28447B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * arch/arm/mach-ep93xx/core.c 4 * Core routines for Cirrus EP93xx chips. 5 * 6 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 7 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> 8 * 9 * Thanks go to Michael Burian and Ray Lehtiniemi for their key 10 * role in the ep93xx linux community. 11 */ 12 13#define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt 14 15#include <linux/kernel.h> 16#include <linux/init.h> 17#include <linux/platform_device.h> 18#include <linux/interrupt.h> 19#include <linux/dma-mapping.h> 20#include <linux/sys_soc.h> 21#include <linux/irq.h> 22#include <linux/io.h> 23#include <linux/gpio.h> 24#include <linux/leds.h> 25#include <linux/termios.h> 26#include <linux/amba/bus.h> 27#include <linux/amba/serial.h> 28#include <linux/mtd/physmap.h> 29#include <linux/i2c.h> 30#include <linux/gpio/machine.h> 31#include <linux/spi/spi.h> 32#include <linux/export.h> 33#include <linux/irqchip/arm-vic.h> 34#include <linux/reboot.h> 35#include <linux/usb/ohci_pdriver.h> 36#include <linux/random.h> 37 38#include "hardware.h" 39#include <linux/platform_data/video-ep93xx.h> 40#include <linux/platform_data/keypad-ep93xx.h> 41#include <linux/platform_data/spi-ep93xx.h> 42#include <linux/soc/cirrus/ep93xx.h> 43 44#include "gpio-ep93xx.h" 45 46#include <asm/mach/arch.h> 47#include <asm/mach/map.h> 48 49#include "soc.h" 50#include "irqs.h" 51 52/************************************************************************* 53 * Static I/O mappings that are needed for all EP93xx platforms 54 *************************************************************************/ 55static struct map_desc ep93xx_io_desc[] __initdata = { 56 { 57 .virtual = EP93XX_AHB_VIRT_BASE, 58 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), 59 .length = EP93XX_AHB_SIZE, 60 .type = MT_DEVICE, 61 }, { 62 .virtual = EP93XX_APB_VIRT_BASE, 63 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), 64 .length = EP93XX_APB_SIZE, 65 .type = MT_DEVICE, 66 }, 67}; 68 69void __init ep93xx_map_io(void) 70{ 71 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); 72} 73 74/************************************************************************* 75 * EP93xx IRQ handling 76 *************************************************************************/ 77void __init ep93xx_init_irq(void) 78{ 79 vic_init(EP93XX_VIC1_BASE, IRQ_EP93XX_VIC0, EP93XX_VIC1_VALID_IRQ_MASK, 0); 80 vic_init(EP93XX_VIC2_BASE, IRQ_EP93XX_VIC1, EP93XX_VIC2_VALID_IRQ_MASK, 0); 81} 82 83 84/************************************************************************* 85 * EP93xx System Controller Software Locked register handling 86 *************************************************************************/ 87 88/* 89 * syscon_swlock prevents anything else from writing to the syscon 90 * block while a software locked register is being written. 91 */ 92static DEFINE_SPINLOCK(syscon_swlock); 93 94void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) 95{ 96 unsigned long flags; 97 98 spin_lock_irqsave(&syscon_swlock, flags); 99 100 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 101 __raw_writel(val, reg); 102 103 spin_unlock_irqrestore(&syscon_swlock, flags); 104} 105 106void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) 107{ 108 unsigned long flags; 109 unsigned int val; 110 111 spin_lock_irqsave(&syscon_swlock, flags); 112 113 val = __raw_readl(EP93XX_SYSCON_DEVCFG); 114 val &= ~clear_bits; 115 val |= set_bits; 116 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 117 __raw_writel(val, EP93XX_SYSCON_DEVCFG); 118 119 spin_unlock_irqrestore(&syscon_swlock, flags); 120} 121 122/** 123 * ep93xx_chip_revision() - returns the EP93xx chip revision 124 * 125 * See "platform.h" for more information. 126 */ 127unsigned int ep93xx_chip_revision(void) 128{ 129 unsigned int v; 130 131 v = __raw_readl(EP93XX_SYSCON_SYSCFG); 132 v &= EP93XX_SYSCON_SYSCFG_REV_MASK; 133 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; 134 return v; 135} 136EXPORT_SYMBOL_GPL(ep93xx_chip_revision); 137 138/************************************************************************* 139 * EP93xx GPIO 140 *************************************************************************/ 141static struct resource ep93xx_gpio_resource[] = { 142 DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc), 143 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB), 144 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX), 145 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX), 146 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX), 147 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX), 148 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX), 149 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX), 150 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX), 151 DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX), 152}; 153 154static struct platform_device ep93xx_gpio_device = { 155 .name = "gpio-ep93xx", 156 .id = -1, 157 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource), 158 .resource = ep93xx_gpio_resource, 159}; 160 161/************************************************************************* 162 * EP93xx peripheral handling 163 *************************************************************************/ 164#define EP93XX_UART_MCR_OFFSET (0x0100) 165 166static void ep93xx_uart_set_mctrl(struct amba_device *dev, 167 void __iomem *base, unsigned int mctrl) 168{ 169 unsigned int mcr; 170 171 mcr = 0; 172 if (mctrl & TIOCM_RTS) 173 mcr |= 2; 174 if (mctrl & TIOCM_DTR) 175 mcr |= 1; 176 177 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 178} 179 180static struct amba_pl010_data ep93xx_uart_data = { 181 .set_mctrl = ep93xx_uart_set_mctrl, 182}; 183 184static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, 185 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); 186 187static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, 188 { IRQ_EP93XX_UART2 }, NULL); 189 190static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, 191 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); 192 193static struct resource ep93xx_rtc_resource[] = { 194 DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c), 195}; 196 197static struct platform_device ep93xx_rtc_device = { 198 .name = "ep93xx-rtc", 199 .id = -1, 200 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), 201 .resource = ep93xx_rtc_resource, 202}; 203 204/************************************************************************* 205 * EP93xx OHCI USB Host 206 *************************************************************************/ 207 208static struct clk *ep93xx_ohci_host_clock; 209 210static int ep93xx_ohci_power_on(struct platform_device *pdev) 211{ 212 if (!ep93xx_ohci_host_clock) { 213 ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL); 214 if (IS_ERR(ep93xx_ohci_host_clock)) 215 return PTR_ERR(ep93xx_ohci_host_clock); 216 } 217 218 return clk_prepare_enable(ep93xx_ohci_host_clock); 219} 220 221static void ep93xx_ohci_power_off(struct platform_device *pdev) 222{ 223 clk_disable(ep93xx_ohci_host_clock); 224} 225 226static struct usb_ohci_pdata ep93xx_ohci_pdata = { 227 .power_on = ep93xx_ohci_power_on, 228 .power_off = ep93xx_ohci_power_off, 229 .power_suspend = ep93xx_ohci_power_off, 230}; 231 232static struct resource ep93xx_ohci_resources[] = { 233 DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000), 234 DEFINE_RES_IRQ(IRQ_EP93XX_USB), 235}; 236 237static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32); 238 239static struct platform_device ep93xx_ohci_device = { 240 .name = "ohci-platform", 241 .id = -1, 242 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 243 .resource = ep93xx_ohci_resources, 244 .dev = { 245 .dma_mask = &ep93xx_ohci_dma_mask, 246 .coherent_dma_mask = DMA_BIT_MASK(32), 247 .platform_data = &ep93xx_ohci_pdata, 248 }, 249}; 250 251/************************************************************************* 252 * EP93xx physmap'ed flash 253 *************************************************************************/ 254static struct physmap_flash_data ep93xx_flash_data; 255 256static struct resource ep93xx_flash_resource = { 257 .flags = IORESOURCE_MEM, 258}; 259 260static struct platform_device ep93xx_flash = { 261 .name = "physmap-flash", 262 .id = 0, 263 .dev = { 264 .platform_data = &ep93xx_flash_data, 265 }, 266 .num_resources = 1, 267 .resource = &ep93xx_flash_resource, 268}; 269 270/** 271 * ep93xx_register_flash() - Register the external flash device. 272 * @width: bank width in octets 273 * @start: resource start address 274 * @size: resource size 275 */ 276void __init ep93xx_register_flash(unsigned int width, 277 resource_size_t start, resource_size_t size) 278{ 279 ep93xx_flash_data.width = width; 280 281 ep93xx_flash_resource.start = start; 282 ep93xx_flash_resource.end = start + size - 1; 283 284 platform_device_register(&ep93xx_flash); 285} 286 287 288/************************************************************************* 289 * EP93xx ethernet peripheral handling 290 *************************************************************************/ 291static struct ep93xx_eth_data ep93xx_eth_data; 292 293static struct resource ep93xx_eth_resource[] = { 294 DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000), 295 DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET), 296}; 297 298static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32); 299 300static struct platform_device ep93xx_eth_device = { 301 .name = "ep93xx-eth", 302 .id = -1, 303 .dev = { 304 .platform_data = &ep93xx_eth_data, 305 .coherent_dma_mask = DMA_BIT_MASK(32), 306 .dma_mask = &ep93xx_eth_dma_mask, 307 }, 308 .num_resources = ARRAY_SIZE(ep93xx_eth_resource), 309 .resource = ep93xx_eth_resource, 310}; 311 312/** 313 * ep93xx_register_eth - Register the built-in ethernet platform device. 314 * @data: platform specific ethernet configuration (__initdata) 315 * @copy_addr: flag indicating that the MAC address should be copied 316 * from the IndAd registers (as programmed by the bootloader) 317 */ 318void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 319{ 320 if (copy_addr) 321 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); 322 323 ep93xx_eth_data = *data; 324 platform_device_register(&ep93xx_eth_device); 325} 326 327 328/************************************************************************* 329 * EP93xx i2c peripheral handling 330 *************************************************************************/ 331 332/* All EP93xx devices use the same two GPIO pins for I2C bit-banging */ 333static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = { 334 .dev_id = "i2c-gpio.0", 335 .table = { 336 /* Use local offsets on gpiochip/port "G" */ 337 GPIO_LOOKUP_IDX("G", 1, NULL, 0, 338 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 339 GPIO_LOOKUP_IDX("G", 0, NULL, 1, 340 GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), 341 }, 342}; 343 344static struct platform_device ep93xx_i2c_device = { 345 .name = "i2c-gpio", 346 .id = 0, 347 .dev = { 348 .platform_data = NULL, 349 }, 350}; 351 352/** 353 * ep93xx_register_i2c - Register the i2c platform device. 354 * @devices: platform specific i2c bus device information (__initdata) 355 * @num: the number of devices on the i2c bus 356 */ 357void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num) 358{ 359 /* 360 * FIXME: this just sets the two pins as non-opendrain, as no 361 * platforms tries to do that anyway. Flag the applicable lines 362 * as open drain in the GPIO_LOOKUP above and the driver or 363 * gpiolib will handle open drain/open drain emulation as need 364 * be. Right now i2c-gpio emulates open drain which is not 365 * optimal. 366 */ 367 __raw_writel((0 << 1) | (0 << 0), 368 EP93XX_GPIO_EEDRIVE); 369 370 i2c_register_board_info(0, devices, num); 371 gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table); 372 platform_device_register(&ep93xx_i2c_device); 373} 374 375/************************************************************************* 376 * EP93xx SPI peripheral handling 377 *************************************************************************/ 378static struct ep93xx_spi_info ep93xx_spi_master_data; 379 380static struct resource ep93xx_spi_resources[] = { 381 DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18), 382 DEFINE_RES_IRQ(IRQ_EP93XX_SSP), 383}; 384 385static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32); 386 387static struct platform_device ep93xx_spi_device = { 388 .name = "ep93xx-spi", 389 .id = 0, 390 .dev = { 391 .platform_data = &ep93xx_spi_master_data, 392 .coherent_dma_mask = DMA_BIT_MASK(32), 393 .dma_mask = &ep93xx_spi_dma_mask, 394 }, 395 .num_resources = ARRAY_SIZE(ep93xx_spi_resources), 396 .resource = ep93xx_spi_resources, 397}; 398 399/** 400 * ep93xx_register_spi() - registers spi platform device 401 * @info: ep93xx board specific spi master info (__initdata) 402 * @devices: SPI devices to register (__initdata) 403 * @num: number of SPI devices to register 404 * 405 * This function registers platform device for the EP93xx SPI controller and 406 * also makes sure that SPI pins are muxed so that I2S is not using those pins. 407 */ 408void __init ep93xx_register_spi(struct ep93xx_spi_info *info, 409 struct spi_board_info *devices, int num) 410{ 411 /* 412 * When SPI is used, we need to make sure that I2S is muxed off from 413 * SPI pins. 414 */ 415 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP); 416 417 ep93xx_spi_master_data = *info; 418 spi_register_board_info(devices, num); 419 platform_device_register(&ep93xx_spi_device); 420} 421 422/************************************************************************* 423 * EP93xx LEDs 424 *************************************************************************/ 425static const struct gpio_led ep93xx_led_pins[] __initconst = { 426 { 427 .name = "platform:grled", 428 .gpio = EP93XX_GPIO_LINE_GRLED, 429 }, { 430 .name = "platform:rdled", 431 .gpio = EP93XX_GPIO_LINE_RDLED, 432 }, 433}; 434 435static const struct gpio_led_platform_data ep93xx_led_data __initconst = { 436 .num_leds = ARRAY_SIZE(ep93xx_led_pins), 437 .leds = ep93xx_led_pins, 438}; 439 440/************************************************************************* 441 * EP93xx pwm peripheral handling 442 *************************************************************************/ 443static struct resource ep93xx_pwm0_resource[] = { 444 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10), 445}; 446 447static struct platform_device ep93xx_pwm0_device = { 448 .name = "ep93xx-pwm", 449 .id = 0, 450 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), 451 .resource = ep93xx_pwm0_resource, 452}; 453 454static struct resource ep93xx_pwm1_resource[] = { 455 DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10), 456}; 457 458static struct platform_device ep93xx_pwm1_device = { 459 .name = "ep93xx-pwm", 460 .id = 1, 461 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), 462 .resource = ep93xx_pwm1_resource, 463}; 464 465void __init ep93xx_register_pwm(int pwm0, int pwm1) 466{ 467 if (pwm0) 468 platform_device_register(&ep93xx_pwm0_device); 469 470 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ 471 if (pwm1) 472 platform_device_register(&ep93xx_pwm1_device); 473} 474 475int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) 476{ 477 int err; 478 479 if (pdev->id == 0) { 480 err = 0; 481 } else if (pdev->id == 1) { 482 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, 483 dev_name(&pdev->dev)); 484 if (err) 485 return err; 486 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); 487 if (err) 488 goto fail; 489 490 /* PWM 1 output on EGPIO[14] */ 491 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); 492 } else { 493 err = -ENODEV; 494 } 495 496 return err; 497 498fail: 499 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 500 return err; 501} 502EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); 503 504void ep93xx_pwm_release_gpio(struct platform_device *pdev) 505{ 506 if (pdev->id == 1) { 507 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); 508 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 509 510 /* EGPIO[14] used for GPIO */ 511 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); 512 } 513} 514EXPORT_SYMBOL(ep93xx_pwm_release_gpio); 515 516 517/************************************************************************* 518 * EP93xx video peripheral handling 519 *************************************************************************/ 520static struct ep93xxfb_mach_info ep93xxfb_data; 521 522static struct resource ep93xx_fb_resource[] = { 523 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800), 524}; 525 526static struct platform_device ep93xx_fb_device = { 527 .name = "ep93xx-fb", 528 .id = -1, 529 .dev = { 530 .platform_data = &ep93xxfb_data, 531 .coherent_dma_mask = DMA_BIT_MASK(32), 532 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 533 }, 534 .num_resources = ARRAY_SIZE(ep93xx_fb_resource), 535 .resource = ep93xx_fb_resource, 536}; 537 538/* The backlight use a single register in the framebuffer's register space */ 539#define EP93XX_RASTER_REG_BRIGHTNESS 0x20 540 541static struct resource ep93xx_bl_resources[] = { 542 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + 543 EP93XX_RASTER_REG_BRIGHTNESS, 0x04), 544}; 545 546static struct platform_device ep93xx_bl_device = { 547 .name = "ep93xx-bl", 548 .id = -1, 549 .num_resources = ARRAY_SIZE(ep93xx_bl_resources), 550 .resource = ep93xx_bl_resources, 551}; 552 553/** 554 * ep93xx_register_fb - Register the framebuffer platform device. 555 * @data: platform specific framebuffer configuration (__initdata) 556 */ 557void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 558{ 559 ep93xxfb_data = *data; 560 platform_device_register(&ep93xx_fb_device); 561 platform_device_register(&ep93xx_bl_device); 562} 563 564 565/************************************************************************* 566 * EP93xx matrix keypad peripheral handling 567 *************************************************************************/ 568static struct ep93xx_keypad_platform_data ep93xx_keypad_data; 569 570static struct resource ep93xx_keypad_resource[] = { 571 DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c), 572 DEFINE_RES_IRQ(IRQ_EP93XX_KEY), 573}; 574 575static struct platform_device ep93xx_keypad_device = { 576 .name = "ep93xx-keypad", 577 .id = -1, 578 .dev = { 579 .platform_data = &ep93xx_keypad_data, 580 }, 581 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 582 .resource = ep93xx_keypad_resource, 583}; 584 585/** 586 * ep93xx_register_keypad - Register the keypad platform device. 587 * @data: platform specific keypad configuration (__initdata) 588 */ 589void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 590{ 591 ep93xx_keypad_data = *data; 592 platform_device_register(&ep93xx_keypad_device); 593} 594 595int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) 596{ 597 int err; 598 int i; 599 600 for (i = 0; i < 8; i++) { 601 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); 602 if (err) 603 goto fail_gpio_c; 604 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); 605 if (err) 606 goto fail_gpio_d; 607 } 608 609 /* Enable the keypad controller; GPIO ports C and D used for keypad */ 610 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | 611 EP93XX_SYSCON_DEVCFG_GONK); 612 613 return 0; 614 615fail_gpio_d: 616 gpio_free(EP93XX_GPIO_LINE_C(i)); 617fail_gpio_c: 618 for (--i; i >= 0; --i) { 619 gpio_free(EP93XX_GPIO_LINE_C(i)); 620 gpio_free(EP93XX_GPIO_LINE_D(i)); 621 } 622 return err; 623} 624EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); 625 626void ep93xx_keypad_release_gpio(struct platform_device *pdev) 627{ 628 int i; 629 630 for (i = 0; i < 8; i++) { 631 gpio_free(EP93XX_GPIO_LINE_C(i)); 632 gpio_free(EP93XX_GPIO_LINE_D(i)); 633 } 634 635 /* Disable the keypad controller; GPIO ports C and D used for GPIO */ 636 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 637 EP93XX_SYSCON_DEVCFG_GONK); 638} 639EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 640 641/************************************************************************* 642 * EP93xx I2S audio peripheral handling 643 *************************************************************************/ 644static struct resource ep93xx_i2s_resource[] = { 645 DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100), 646 DEFINE_RES_IRQ(IRQ_EP93XX_SAI), 647}; 648 649static struct platform_device ep93xx_i2s_device = { 650 .name = "ep93xx-i2s", 651 .id = -1, 652 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), 653 .resource = ep93xx_i2s_resource, 654}; 655 656static struct platform_device ep93xx_pcm_device = { 657 .name = "ep93xx-pcm-audio", 658 .id = -1, 659}; 660 661void __init ep93xx_register_i2s(void) 662{ 663 platform_device_register(&ep93xx_i2s_device); 664 platform_device_register(&ep93xx_pcm_device); 665} 666 667#define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ 668 EP93XX_SYSCON_DEVCFG_I2SONAC97) 669 670#define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ 671 EP93XX_SYSCON_I2SCLKDIV_SPOL) 672 673int ep93xx_i2s_acquire(void) 674{ 675 unsigned val; 676 677 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97, 678 EP93XX_SYSCON_DEVCFG_I2S_MASK); 679 680 /* 681 * This is potentially racy with the clock api for i2s_mclk, sclk and 682 * lrclk. Since the i2s driver is the only user of those clocks we 683 * rely on it to prevent parallel use of this function and the 684 * clock api for the i2s clocks. 685 */ 686 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); 687 val &= ~EP93XX_I2SCLKDIV_MASK; 688 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL; 689 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); 690 691 return 0; 692} 693EXPORT_SYMBOL(ep93xx_i2s_acquire); 694 695void ep93xx_i2s_release(void) 696{ 697 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); 698} 699EXPORT_SYMBOL(ep93xx_i2s_release); 700 701/************************************************************************* 702 * EP93xx AC97 audio peripheral handling 703 *************************************************************************/ 704static struct resource ep93xx_ac97_resources[] = { 705 DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac), 706 DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR), 707}; 708 709static struct platform_device ep93xx_ac97_device = { 710 .name = "ep93xx-ac97", 711 .id = -1, 712 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources), 713 .resource = ep93xx_ac97_resources, 714}; 715 716void __init ep93xx_register_ac97(void) 717{ 718 /* 719 * Make sure that the AC97 pins are not used by I2S. 720 */ 721 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97); 722 723 platform_device_register(&ep93xx_ac97_device); 724 platform_device_register(&ep93xx_pcm_device); 725} 726 727/************************************************************************* 728 * EP93xx Watchdog 729 *************************************************************************/ 730static struct resource ep93xx_wdt_resources[] = { 731 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08), 732}; 733 734static struct platform_device ep93xx_wdt_device = { 735 .name = "ep93xx-wdt", 736 .id = -1, 737 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources), 738 .resource = ep93xx_wdt_resources, 739}; 740 741/************************************************************************* 742 * EP93xx IDE 743 *************************************************************************/ 744static struct resource ep93xx_ide_resources[] = { 745 DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38), 746 DEFINE_RES_IRQ(IRQ_EP93XX_EXT3), 747}; 748 749static struct platform_device ep93xx_ide_device = { 750 .name = "ep93xx-ide", 751 .id = -1, 752 .dev = { 753 .dma_mask = &ep93xx_ide_device.dev.coherent_dma_mask, 754 .coherent_dma_mask = DMA_BIT_MASK(32), 755 }, 756 .num_resources = ARRAY_SIZE(ep93xx_ide_resources), 757 .resource = ep93xx_ide_resources, 758}; 759 760void __init ep93xx_register_ide(void) 761{ 762 platform_device_register(&ep93xx_ide_device); 763} 764 765int ep93xx_ide_acquire_gpio(struct platform_device *pdev) 766{ 767 int err; 768 int i; 769 770 err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev)); 771 if (err) 772 return err; 773 err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev)); 774 if (err) 775 goto fail_egpio15; 776 for (i = 2; i < 8; i++) { 777 err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev)); 778 if (err) 779 goto fail_gpio_e; 780 } 781 for (i = 4; i < 8; i++) { 782 err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev)); 783 if (err) 784 goto fail_gpio_g; 785 } 786 for (i = 0; i < 8; i++) { 787 err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev)); 788 if (err) 789 goto fail_gpio_h; 790 } 791 792 /* GPIO ports E[7:2], G[7:4] and H used by IDE */ 793 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE | 794 EP93XX_SYSCON_DEVCFG_GONIDE | 795 EP93XX_SYSCON_DEVCFG_HONIDE); 796 return 0; 797 798fail_gpio_h: 799 for (--i; i >= 0; --i) 800 gpio_free(EP93XX_GPIO_LINE_H(i)); 801 i = 8; 802fail_gpio_g: 803 for (--i; i >= 4; --i) 804 gpio_free(EP93XX_GPIO_LINE_G(i)); 805 i = 8; 806fail_gpio_e: 807 for (--i; i >= 2; --i) 808 gpio_free(EP93XX_GPIO_LINE_E(i)); 809 gpio_free(EP93XX_GPIO_LINE_EGPIO15); 810fail_egpio15: 811 gpio_free(EP93XX_GPIO_LINE_EGPIO2); 812 return err; 813} 814EXPORT_SYMBOL(ep93xx_ide_acquire_gpio); 815 816void ep93xx_ide_release_gpio(struct platform_device *pdev) 817{ 818 int i; 819 820 for (i = 2; i < 8; i++) 821 gpio_free(EP93XX_GPIO_LINE_E(i)); 822 for (i = 4; i < 8; i++) 823 gpio_free(EP93XX_GPIO_LINE_G(i)); 824 for (i = 0; i < 8; i++) 825 gpio_free(EP93XX_GPIO_LINE_H(i)); 826 gpio_free(EP93XX_GPIO_LINE_EGPIO15); 827 gpio_free(EP93XX_GPIO_LINE_EGPIO2); 828 829 830 /* GPIO ports E[7:2], G[7:4] and H used by GPIO */ 831 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE | 832 EP93XX_SYSCON_DEVCFG_GONIDE | 833 EP93XX_SYSCON_DEVCFG_HONIDE); 834} 835EXPORT_SYMBOL(ep93xx_ide_release_gpio); 836 837/************************************************************************* 838 * EP93xx ADC 839 *************************************************************************/ 840static struct resource ep93xx_adc_resources[] = { 841 DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28), 842 DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH), 843}; 844 845static struct platform_device ep93xx_adc_device = { 846 .name = "ep93xx-adc", 847 .id = -1, 848 .num_resources = ARRAY_SIZE(ep93xx_adc_resources), 849 .resource = ep93xx_adc_resources, 850}; 851 852void __init ep93xx_register_adc(void) 853{ 854 /* Power up ADC, deactivate Touch Screen Controller */ 855 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN, 856 EP93XX_SYSCON_DEVCFG_ADCPD); 857 858 platform_device_register(&ep93xx_adc_device); 859} 860 861/************************************************************************* 862 * EP93xx Security peripheral 863 *************************************************************************/ 864 865/* 866 * The Maverick Key is 256 bits of micro fuses blown at the factory during 867 * manufacturing to uniquely identify a part. 868 * 869 * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key 870 */ 871#define EP93XX_SECURITY_REG(x) (EP93XX_SECURITY_BASE + (x)) 872#define EP93XX_SECURITY_SECFLG EP93XX_SECURITY_REG(0x2400) 873#define EP93XX_SECURITY_FUSEFLG EP93XX_SECURITY_REG(0x2410) 874#define EP93XX_SECURITY_UNIQID EP93XX_SECURITY_REG(0x2440) 875#define EP93XX_SECURITY_UNIQCHK EP93XX_SECURITY_REG(0x2450) 876#define EP93XX_SECURITY_UNIQVAL EP93XX_SECURITY_REG(0x2460) 877#define EP93XX_SECURITY_SECID1 EP93XX_SECURITY_REG(0x2500) 878#define EP93XX_SECURITY_SECID2 EP93XX_SECURITY_REG(0x2504) 879#define EP93XX_SECURITY_SECCHK1 EP93XX_SECURITY_REG(0x2520) 880#define EP93XX_SECURITY_SECCHK2 EP93XX_SECURITY_REG(0x2524) 881#define EP93XX_SECURITY_UNIQID2 EP93XX_SECURITY_REG(0x2700) 882#define EP93XX_SECURITY_UNIQID3 EP93XX_SECURITY_REG(0x2704) 883#define EP93XX_SECURITY_UNIQID4 EP93XX_SECURITY_REG(0x2708) 884#define EP93XX_SECURITY_UNIQID5 EP93XX_SECURITY_REG(0x270c) 885 886static char ep93xx_soc_id[33]; 887 888static const char __init *ep93xx_get_soc_id(void) 889{ 890 unsigned int id, id2, id3, id4, id5; 891 892 if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1) 893 return "bad Hamming code"; 894 895 id = __raw_readl(EP93XX_SECURITY_UNIQID); 896 id2 = __raw_readl(EP93XX_SECURITY_UNIQID2); 897 id3 = __raw_readl(EP93XX_SECURITY_UNIQID3); 898 id4 = __raw_readl(EP93XX_SECURITY_UNIQID4); 899 id5 = __raw_readl(EP93XX_SECURITY_UNIQID5); 900 901 if (id != id2) 902 return "invalid"; 903 904 /* Toss the unique ID into the entropy pool */ 905 add_device_randomness(&id2, 4); 906 add_device_randomness(&id3, 4); 907 add_device_randomness(&id4, 4); 908 add_device_randomness(&id5, 4); 909 910 snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id), 911 "%08x%08x%08x%08x", id2, id3, id4, id5); 912 913 return ep93xx_soc_id; 914} 915 916static const char __init *ep93xx_get_soc_rev(void) 917{ 918 int rev = ep93xx_chip_revision(); 919 920 switch (rev) { 921 case EP93XX_CHIP_REV_D0: 922 return "D0"; 923 case EP93XX_CHIP_REV_D1: 924 return "D1"; 925 case EP93XX_CHIP_REV_E0: 926 return "E0"; 927 case EP93XX_CHIP_REV_E1: 928 return "E1"; 929 case EP93XX_CHIP_REV_E2: 930 return "E2"; 931 default: 932 return "unknown"; 933 } 934} 935 936static const char __init *ep93xx_get_machine_name(void) 937{ 938 return kasprintf(GFP_KERNEL,"%s", machine_desc->name); 939} 940 941static struct device __init *ep93xx_init_soc(void) 942{ 943 struct soc_device_attribute *soc_dev_attr; 944 struct soc_device *soc_dev; 945 946 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 947 if (!soc_dev_attr) 948 return NULL; 949 950 soc_dev_attr->machine = ep93xx_get_machine_name(); 951 soc_dev_attr->family = "Cirrus Logic EP93xx"; 952 soc_dev_attr->revision = ep93xx_get_soc_rev(); 953 soc_dev_attr->soc_id = ep93xx_get_soc_id(); 954 955 soc_dev = soc_device_register(soc_dev_attr); 956 if (IS_ERR(soc_dev)) { 957 kfree(soc_dev_attr->machine); 958 kfree(soc_dev_attr); 959 return NULL; 960 } 961 962 return soc_device_to_device(soc_dev); 963} 964 965struct device __init *ep93xx_init_devices(void) 966{ 967 struct device *parent; 968 969 /* Disallow access to MaverickCrunch initially */ 970 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); 971 972 /* Default all ports to GPIO */ 973 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 974 EP93XX_SYSCON_DEVCFG_GONK | 975 EP93XX_SYSCON_DEVCFG_EONIDE | 976 EP93XX_SYSCON_DEVCFG_GONIDE | 977 EP93XX_SYSCON_DEVCFG_HONIDE); 978 979 parent = ep93xx_init_soc(); 980 981 /* Get the GPIO working early, other devices need it */ 982 platform_device_register(&ep93xx_gpio_device); 983 984 amba_device_register(&uart1_device, &iomem_resource); 985 amba_device_register(&uart2_device, &iomem_resource); 986 amba_device_register(&uart3_device, &iomem_resource); 987 988 platform_device_register(&ep93xx_rtc_device); 989 platform_device_register(&ep93xx_ohci_device); 990 platform_device_register(&ep93xx_wdt_device); 991 992 gpio_led_register_device(-1, &ep93xx_led_data); 993 994 return parent; 995} 996 997void ep93xx_restart(enum reboot_mode mode, const char *cmd) 998{ 999 /* 1000 * Set then clear the SWRST bit to initiate a software reset 1001 */ 1002 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); 1003 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); 1004 1005 while (1) 1006 ; 1007}