common.h (4601B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Copyright (c) 2011 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com 5 * 6 * Common Header for Exynos machines 7 */ 8 9#ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H 10#define __ARCH_ARM_MACH_EXYNOS_COMMON_H 11 12#include <linux/platform_data/cpuidle-exynos.h> 13 14#define EXYNOS3250_SOC_ID 0xE3472000 15#define EXYNOS3_SOC_MASK 0xFFFFF000 16 17#define EXYNOS4210_CPU_ID 0x43210000 18#define EXYNOS4412_CPU_ID 0xE4412200 19#define EXYNOS4_CPU_MASK 0xFFFE0000 20 21#define EXYNOS5250_SOC_ID 0x43520000 22#define EXYNOS5410_SOC_ID 0xE5410000 23#define EXYNOS5420_SOC_ID 0xE5420000 24#define EXYNOS5800_SOC_ID 0xE5422000 25#define EXYNOS5_SOC_MASK 0xFFFFF000 26 27extern unsigned long exynos_cpu_id; 28 29#define IS_SAMSUNG_CPU(name, id, mask) \ 30static inline int is_samsung_##name(void) \ 31{ \ 32 return ((exynos_cpu_id & mask) == (id & mask)); \ 33} 34 35IS_SAMSUNG_CPU(exynos3250, EXYNOS3250_SOC_ID, EXYNOS3_SOC_MASK) 36IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK) 37IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK) 38IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK) 39IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK) 40IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK) 41IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK) 42 43#if defined(CONFIG_SOC_EXYNOS3250) 44# define soc_is_exynos3250() is_samsung_exynos3250() 45#else 46# define soc_is_exynos3250() 0 47#endif 48 49#if defined(CONFIG_CPU_EXYNOS4210) 50# define soc_is_exynos4210() is_samsung_exynos4210() 51#else 52# define soc_is_exynos4210() 0 53#endif 54 55#if defined(CONFIG_SOC_EXYNOS4412) 56# define soc_is_exynos4412() is_samsung_exynos4412() 57#else 58# define soc_is_exynos4412() 0 59#endif 60 61#define EXYNOS4210_REV_0 (0x0) 62#define EXYNOS4210_REV_1_0 (0x10) 63#define EXYNOS4210_REV_1_1 (0x11) 64 65#if defined(CONFIG_SOC_EXYNOS5250) 66# define soc_is_exynos5250() is_samsung_exynos5250() 67#else 68# define soc_is_exynos5250() 0 69#endif 70 71#if defined(CONFIG_SOC_EXYNOS5410) 72# define soc_is_exynos5410() is_samsung_exynos5410() 73#else 74# define soc_is_exynos5410() 0 75#endif 76 77#if defined(CONFIG_SOC_EXYNOS5420) 78# define soc_is_exynos5420() is_samsung_exynos5420() 79#else 80# define soc_is_exynos5420() 0 81#endif 82 83#if defined(CONFIG_SOC_EXYNOS5800) 84# define soc_is_exynos5800() is_samsung_exynos5800() 85#else 86# define soc_is_exynos5800() 0 87#endif 88 89extern u32 cp15_save_diag; 90extern u32 cp15_save_power; 91 92extern void __iomem *sysram_ns_base_addr; 93extern void __iomem *sysram_base_addr; 94extern phys_addr_t sysram_base_phys; 95extern void __iomem *pmu_base_addr; 96void exynos_sysram_init(void); 97 98enum { 99 FW_DO_IDLE_SLEEP, 100 FW_DO_IDLE_AFTR, 101}; 102 103void exynos_firmware_init(void); 104 105/* CPU BOOT mode flag for Exynos3250 SoC bootloader */ 106#define C2_STATE (1 << 3) 107/* 108 * Magic values for bootloader indicating chosen low power mode. 109 * See also Documentation/arm/samsung/bootloader-interface.rst 110 */ 111#define EXYNOS_SLEEP_MAGIC 0x00000bad 112#define EXYNOS_AFTR_MAGIC 0xfcba0d10 113 114bool __init exynos_secure_firmware_available(void); 115void exynos_set_boot_flag(unsigned int cpu, unsigned int mode); 116void exynos_clear_boot_flag(unsigned int cpu, unsigned int mode); 117 118#ifdef CONFIG_PM_SLEEP 119extern void __init exynos_pm_init(void); 120#else 121static inline void exynos_pm_init(void) {} 122#endif 123 124extern void exynos_cpu_resume(void); 125extern void exynos_cpu_resume_ns(void); 126 127extern const struct smp_operations exynos_smp_ops; 128 129extern void exynos_cpu_power_down(int cpu); 130extern void exynos_cpu_power_up(int cpu); 131extern int exynos_cpu_power_state(int cpu); 132extern void exynos_cluster_power_down(int cluster); 133extern void exynos_cluster_power_up(int cluster); 134extern int exynos_cluster_power_state(int cluster); 135extern void exynos_cpu_save_register(void); 136extern void exynos_cpu_restore_register(void); 137extern void exynos_pm_central_suspend(void); 138extern int exynos_pm_central_resume(void); 139extern void exynos_enter_aftr(void); 140#ifdef CONFIG_SMP 141extern void exynos_scu_enable(void); 142#else 143static inline void exynos_scu_enable(void) { } 144#endif 145 146extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data; 147 148extern void exynos_set_delayed_reset_assertion(bool enable); 149 150extern unsigned int exynos_rev(void); 151extern void exynos_core_restart(u32 core_id); 152extern int exynos_set_boot_addr(u32 core_id, unsigned long boot_addr); 153extern int exynos_get_boot_addr(u32 core_id, unsigned long *boot_addr); 154 155static inline void pmu_raw_writel(u32 val, u32 offset) 156{ 157 writel_relaxed(val, pmu_base_addr + offset); 158} 159 160static inline u32 pmu_raw_readl(u32 offset) 161{ 162 return readl_relaxed(pmu_base_addr + offset); 163} 164 165#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */