cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

irqs.h (3096B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * arch/arm/mach-footbridge/include/mach/irqs.h
      4 *
      5 * Copyright (C) 1998 Russell King
      6 * Copyright (C) 1998 Phil Blundell
      7 *
      8 * Changelog:
      9 *  20-Jan-1998	RMK	Started merge of EBSA286, CATS and NetWinder
     10 *  01-Feb-1999	PJB	ISA IRQs start at 0 not 16
     11 */
     12#include <asm/mach-types.h>
     13
     14#define NR_IRQS			36
     15#define NR_DC21285_IRQS		16
     16
     17#define _ISA_IRQ(x)		(0 + (x))
     18#define _ISA_INR(x)		((x) - 0)
     19#define _DC21285_IRQ(x)		(16 + (x))
     20#define _DC21285_INR(x)		((x) - 16)
     21
     22/*
     23 * This is a list of all interrupts that the 21285
     24 * can generate and we handle.
     25 */
     26#define IRQ_CONRX		_DC21285_IRQ(0)
     27#define IRQ_CONTX		_DC21285_IRQ(1)
     28#define IRQ_TIMER1		_DC21285_IRQ(2)
     29#define IRQ_TIMER2		_DC21285_IRQ(3)
     30#define IRQ_TIMER3		_DC21285_IRQ(4)
     31#define IRQ_IN0			_DC21285_IRQ(5)
     32#define IRQ_IN1			_DC21285_IRQ(6)
     33#define IRQ_IN2			_DC21285_IRQ(7)
     34#define IRQ_IN3			_DC21285_IRQ(8)
     35#define IRQ_DOORBELLHOST	_DC21285_IRQ(9)
     36#define IRQ_DMA1		_DC21285_IRQ(10)
     37#define IRQ_DMA2		_DC21285_IRQ(11)
     38#define IRQ_PCI			_DC21285_IRQ(12)
     39#define IRQ_SDRAMPARITY		_DC21285_IRQ(13)
     40#define IRQ_I2OINPOST		_DC21285_IRQ(14)
     41#define IRQ_PCI_ABORT		_DC21285_IRQ(15)
     42#define IRQ_PCI_SERR		_DC21285_IRQ(16)
     43#define IRQ_DISCARD_TIMER	_DC21285_IRQ(17)
     44#define IRQ_PCI_DPERR		_DC21285_IRQ(18)
     45#define IRQ_PCI_PERR		_DC21285_IRQ(19)
     46
     47#define IRQ_ISA_TIMER		_ISA_IRQ(0)
     48#define IRQ_ISA_KEYBOARD	_ISA_IRQ(1)
     49#define IRQ_ISA_CASCADE		_ISA_IRQ(2)
     50#define IRQ_ISA_UART2		_ISA_IRQ(3)
     51#define IRQ_ISA_UART		_ISA_IRQ(4)
     52#define IRQ_ISA_FLOPPY		_ISA_IRQ(6)
     53#define IRQ_ISA_PRINTER		_ISA_IRQ(7)
     54#define IRQ_ISA_RTC_ALARM	_ISA_IRQ(8)
     55#define IRQ_ISA_2		_ISA_IRQ(9)
     56#define IRQ_ISA_PS2MOUSE	_ISA_IRQ(12)
     57#define IRQ_ISA_HARDDISK1	_ISA_IRQ(14)
     58#define IRQ_ISA_HARDDISK2	_ISA_IRQ(15)
     59
     60#define IRQ_MASK_UART_RX	(1 << 2)
     61#define IRQ_MASK_UART_TX	(1 << 3)
     62#define IRQ_MASK_TIMER1		(1 << 4)
     63#define IRQ_MASK_TIMER2		(1 << 5)
     64#define IRQ_MASK_TIMER3		(1 << 6)
     65#define IRQ_MASK_IN0		(1 << 8)
     66#define IRQ_MASK_IN1		(1 << 9)
     67#define IRQ_MASK_IN2		(1 << 10)
     68#define IRQ_MASK_IN3		(1 << 11)
     69#define IRQ_MASK_DOORBELLHOST	(1 << 15)
     70#define IRQ_MASK_DMA1		(1 << 16)
     71#define IRQ_MASK_DMA2		(1 << 17)
     72#define IRQ_MASK_PCI		(1 << 18)
     73#define IRQ_MASK_SDRAMPARITY	(1 << 24)
     74#define IRQ_MASK_I2OINPOST	(1 << 25)
     75#define IRQ_MASK_PCI_ABORT	((1 << 29) | (1 << 30))
     76#define IRQ_MASK_PCI_SERR	(1 << 23)
     77#define IRQ_MASK_DISCARD_TIMER	(1 << 27)
     78#define IRQ_MASK_PCI_DPERR	(1 << 28)
     79#define IRQ_MASK_PCI_PERR	(1 << 31)
     80
     81/*
     82 * Netwinder interrupt allocations
     83 */
     84#define IRQ_NETWINDER_ETHER10	IRQ_IN0
     85#define IRQ_NETWINDER_ETHER100	IRQ_IN1
     86#define IRQ_NETWINDER_VIDCOMP	IRQ_IN2
     87#define IRQ_NETWINDER_PS2MOUSE	_ISA_IRQ(5)
     88#define IRQ_NETWINDER_IR	_ISA_IRQ(6)
     89#define IRQ_NETWINDER_BUTTON	_ISA_IRQ(10)
     90#define IRQ_NETWINDER_VGA	_ISA_IRQ(11)
     91#define IRQ_NETWINDER_SOUND	_ISA_IRQ(12)
     92
     93#define I8042_KBD_IRQ	IRQ_ISA_KEYBOARD
     94#define I8042_AUX_IRQ	(machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
     95#define IRQ_FLOPPYDISK	IRQ_ISA_FLOPPY
     96
     97#define irq_canonicalize(_i)	(((_i) == IRQ_ISA_CASCADE) ? IRQ_ISA_2 : _i)