cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hisilicon.c (1338B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * (HiSilicon's SoC based) flattened device tree enabled machine
      4 *
      5 * Copyright (c) 2012-2013 HiSilicon Ltd.
      6 * Copyright (c) 2012-2013 Linaro Ltd.
      7 *
      8 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
      9*/
     10
     11#include <linux/clocksource.h>
     12#include <linux/irqchip.h>
     13
     14#include <asm/mach/arch.h>
     15#include <asm/mach/map.h>
     16
     17#define HI3620_SYSCTRL_PHYS_BASE		0xfc802000
     18#define HI3620_SYSCTRL_VIRT_BASE		0xfe802000
     19
     20/*
     21 * This table is only for optimization. Since ioremap() could always share
     22 * the same mapping if it's defined as static IO mapping.
     23 *
     24 * Without this table, system could also work. The cost is some virtual address
     25 * spaces wasted since ioremap() may be called multi times for the same
     26 * IO space.
     27 */
     28static struct map_desc hi3620_io_desc[] __initdata = {
     29	{
     30		/* sysctrl */
     31		.pfn		= __phys_to_pfn(HI3620_SYSCTRL_PHYS_BASE),
     32		.virtual	= HI3620_SYSCTRL_VIRT_BASE,
     33		.length		= 0x1000,
     34		.type		= MT_DEVICE,
     35	},
     36};
     37
     38static void __init hi3620_map_io(void)
     39{
     40	debug_ll_io_init();
     41	iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
     42}
     43
     44static const char *const hi3xxx_compat[] __initconst = {
     45	"hisilicon,hi3620-hi4511",
     46	NULL,
     47};
     48
     49DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
     50	.map_io		= hi3620_map_io,
     51	.dt_compat	= hi3xxx_compat,
     52MACHINE_END