cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cpu-imx31.c (1783B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * MX31 CPU type detection
      4 *
      5 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
      6 */
      7
      8#include <linux/module.h>
      9#include <linux/of_address.h>
     10#include <linux/io.h>
     11
     12#include "common.h"
     13#include "hardware.h"
     14#include "iim.h"
     15
     16static int mx31_cpu_rev = -1;
     17
     18static struct {
     19	u8 srev;
     20	const char *name;
     21	unsigned int rev;
     22} mx31_cpu_type[] = {
     23	{ .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
     24	{ .srev = 0x10, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
     25	{ .srev = 0x11, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
     26	{ .srev = 0x12, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_1 },
     27	{ .srev = 0x13, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_1 },
     28	{ .srev = 0x14, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_1_2 },
     29	{ .srev = 0x15, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_1_2 },
     30	{ .srev = 0x28, .name = "i.MX31",    .rev = IMX_CHIP_REVISION_2_0 },
     31	{ .srev = 0x29, .name = "i.MX31L",   .rev = IMX_CHIP_REVISION_2_0 },
     32};
     33
     34static int mx31_read_cpu_rev(void)
     35{
     36	void __iomem *iim_base;
     37	struct device_node *np;
     38	u32 i, srev;
     39
     40	np = of_find_compatible_node(NULL, NULL, "fsl,imx31-iim");
     41	iim_base = of_iomap(np, 0);
     42	BUG_ON(!iim_base);
     43
     44	/* read SREV register from IIM module */
     45	srev = imx_readl(iim_base + MXC_IIMSREV);
     46	srev &= 0xff;
     47
     48	for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
     49		if (srev == mx31_cpu_type[i].srev) {
     50			imx_print_silicon_rev(mx31_cpu_type[i].name,
     51						mx31_cpu_type[i].rev);
     52			return mx31_cpu_type[i].rev;
     53		}
     54
     55	imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
     56	return IMX_CHIP_REVISION_UNKNOWN;
     57}
     58
     59int mx31_revision(void)
     60{
     61	if (mx31_cpu_rev == -1)
     62		mx31_cpu_rev = mx31_read_cpu_rev();
     63
     64	return mx31_cpu_rev;
     65}
     66EXPORT_SYMBOL(mx31_revision);