cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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irqs.h (1433B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Author:	Rory Bolt <rorybolt@pacbell.net>
      4 * Copyright:	(C) 2002 Rory Bolt
      5 */
      6
      7#ifndef __IOP32X_IRQS_H
      8#define __IOP32X_IRQS_H
      9
     10/* Interrupts in Linux start at 1, hardware starts at 0 */
     11
     12#define IOP_IRQ(x) ((x) + 1)
     13
     14/*
     15 * IOP80321 chipset interrupts
     16 */
     17#define IRQ_IOP32X_DMA0_EOT	IOP_IRQ(0)
     18#define IRQ_IOP32X_DMA0_EOC	IOP_IRQ(1)
     19#define IRQ_IOP32X_DMA1_EOT	IOP_IRQ(2)
     20#define IRQ_IOP32X_DMA1_EOC	IOP_IRQ(3)
     21#define IRQ_IOP32X_AA_EOT	IOP_IRQ(6)
     22#define IRQ_IOP32X_AA_EOC	IOP_IRQ(7)
     23#define IRQ_IOP32X_CORE_PMON	IOP_IRQ(8)
     24#define IRQ_IOP32X_TIMER0	IOP_IRQ(9)
     25#define IRQ_IOP32X_TIMER1	IOP_IRQ(10)
     26#define IRQ_IOP32X_I2C_0	IOP_IRQ(11)
     27#define IRQ_IOP32X_I2C_1	IOP_IRQ(12)
     28#define IRQ_IOP32X_MESSAGING	IOP_IRQ(13)
     29#define IRQ_IOP32X_ATU_BIST	IOP_IRQ(14)
     30#define IRQ_IOP32X_PERFMON	IOP_IRQ(15)
     31#define IRQ_IOP32X_CORE_PMU	IOP_IRQ(16)
     32#define IRQ_IOP32X_BIU_ERR	IOP_IRQ(17)
     33#define IRQ_IOP32X_ATU_ERR	IOP_IRQ(18)
     34#define IRQ_IOP32X_MCU_ERR	IOP_IRQ(19)
     35#define IRQ_IOP32X_DMA0_ERR	IOP_IRQ(20)
     36#define IRQ_IOP32X_DMA1_ERR	IOP_IRQ(21)
     37#define IRQ_IOP32X_AA_ERR	IOP_IRQ(23)
     38#define IRQ_IOP32X_MSG_ERR	IOP_IRQ(24)
     39#define IRQ_IOP32X_SSP		IOP_IRQ(25)
     40#define IRQ_IOP32X_XINT0	IOP_IRQ(27)
     41#define IRQ_IOP32X_XINT1	IOP_IRQ(28)
     42#define IRQ_IOP32X_XINT2	IOP_IRQ(29)
     43#define IRQ_IOP32X_XINT3	IOP_IRQ(30)
     44#define IRQ_IOP32X_HPI		IOP_IRQ(31)
     45
     46#define IOP32X_NR_IRQS		(IRQ_IOP32X_HPI + 1)
     47
     48#endif