cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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brownstone.c (5747B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  linux/arch/arm/mach-mmp/brownstone.c
      4 *
      5 *  Support for the Marvell Brownstone Development Platform.
      6 *
      7 *  Copyright (C) 2009-2010 Marvell International Ltd.
      8 */
      9
     10#include <linux/init.h>
     11#include <linux/kernel.h>
     12#include <linux/platform_device.h>
     13#include <linux/io.h>
     14#include <linux/gpio-pxa.h>
     15#include <linux/gpio/machine.h>
     16#include <linux/regulator/machine.h>
     17#include <linux/regulator/max8649.h>
     18#include <linux/regulator/fixed.h>
     19#include <linux/mfd/max8925.h>
     20
     21#include <asm/mach-types.h>
     22#include <asm/mach/arch.h>
     23#include "addr-map.h"
     24#include "mfp-mmp2.h"
     25#include "mmp2.h"
     26#include "irqs.h"
     27
     28#include "common.h"
     29
     30#define BROWNSTONE_NR_IRQS	(MMP_NR_IRQS + 40)
     31
     32#define GPIO_5V_ENABLE		(89)
     33
     34static unsigned long brownstone_pin_config[] __initdata = {
     35	/* UART1 */
     36	GPIO29_UART1_RXD,
     37	GPIO30_UART1_TXD,
     38
     39	/* UART3 */
     40	GPIO51_UART3_RXD,
     41	GPIO52_UART3_TXD,
     42
     43	/* DFI */
     44	GPIO168_DFI_D0,
     45	GPIO167_DFI_D1,
     46	GPIO166_DFI_D2,
     47	GPIO165_DFI_D3,
     48	GPIO107_DFI_D4,
     49	GPIO106_DFI_D5,
     50	GPIO105_DFI_D6,
     51	GPIO104_DFI_D7,
     52	GPIO111_DFI_D8,
     53	GPIO164_DFI_D9,
     54	GPIO163_DFI_D10,
     55	GPIO162_DFI_D11,
     56	GPIO161_DFI_D12,
     57	GPIO110_DFI_D13,
     58	GPIO109_DFI_D14,
     59	GPIO108_DFI_D15,
     60	GPIO143_ND_nCS0,
     61	GPIO144_ND_nCS1,
     62	GPIO147_ND_nWE,
     63	GPIO148_ND_nRE,
     64	GPIO150_ND_ALE,
     65	GPIO149_ND_CLE,
     66	GPIO112_ND_RDY0,
     67	GPIO160_ND_RDY1,
     68
     69	/* PMIC */
     70	PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
     71
     72	/* MMC0 */
     73	GPIO131_MMC1_DAT3 | MFP_PULL_HIGH,
     74	GPIO132_MMC1_DAT2 | MFP_PULL_HIGH,
     75	GPIO133_MMC1_DAT1 | MFP_PULL_HIGH,
     76	GPIO134_MMC1_DAT0 | MFP_PULL_HIGH,
     77	GPIO136_MMC1_CMD | MFP_PULL_HIGH,
     78	GPIO139_MMC1_CLK,
     79	GPIO140_MMC1_CD | MFP_PULL_LOW,
     80	GPIO141_MMC1_WP | MFP_PULL_LOW,
     81
     82	/* MMC1 */
     83	GPIO37_MMC2_DAT3 | MFP_PULL_HIGH,
     84	GPIO38_MMC2_DAT2 | MFP_PULL_HIGH,
     85	GPIO39_MMC2_DAT1 | MFP_PULL_HIGH,
     86	GPIO40_MMC2_DAT0 | MFP_PULL_HIGH,
     87	GPIO41_MMC2_CMD | MFP_PULL_HIGH,
     88	GPIO42_MMC2_CLK,
     89
     90	/* MMC2 */
     91	GPIO165_MMC3_DAT7 | MFP_PULL_HIGH,
     92	GPIO162_MMC3_DAT6 | MFP_PULL_HIGH,
     93	GPIO166_MMC3_DAT5 | MFP_PULL_HIGH,
     94	GPIO163_MMC3_DAT4 | MFP_PULL_HIGH,
     95	GPIO167_MMC3_DAT3 | MFP_PULL_HIGH,
     96	GPIO164_MMC3_DAT2 | MFP_PULL_HIGH,
     97	GPIO168_MMC3_DAT1 | MFP_PULL_HIGH,
     98	GPIO111_MMC3_DAT0 | MFP_PULL_HIGH,
     99	GPIO112_MMC3_CMD | MFP_PULL_HIGH,
    100	GPIO151_MMC3_CLK,
    101
    102	/* 5V regulator */
    103	GPIO89_GPIO,
    104};
    105
    106static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
    107	.irq_base	= MMP_GPIO_TO_IRQ(0),
    108};
    109
    110static struct regulator_consumer_supply max8649_supply[] = {
    111	REGULATOR_SUPPLY("vcc_core", NULL),
    112};
    113
    114static struct regulator_init_data max8649_init_data = {
    115	.constraints	= {
    116		.name		= "vcc_core range",
    117		.min_uV		= 1150000,
    118		.max_uV		= 1280000,
    119		.always_on	= 1,
    120		.boot_on	= 1,
    121		.valid_ops_mask	= REGULATOR_CHANGE_VOLTAGE,
    122	},
    123	.num_consumer_supplies	= 1,
    124	.consumer_supplies	= &max8649_supply[0],
    125};
    126
    127static struct max8649_platform_data brownstone_max8649_info = {
    128	.mode		= 2,	/* VID1 = 1, VID0 = 0 */
    129	.extclk		= 0,
    130	.ramp_timing	= MAX8649_RAMP_32MV,
    131	.regulator	= &max8649_init_data,
    132};
    133
    134static struct regulator_consumer_supply brownstone_v_5vp_supplies[] = {
    135	REGULATOR_SUPPLY("v_5vp", NULL),
    136};
    137
    138static struct regulator_init_data brownstone_v_5vp_data = {
    139	.constraints	= {
    140		.valid_ops_mask		= REGULATOR_CHANGE_STATUS,
    141	},
    142	.num_consumer_supplies	= ARRAY_SIZE(brownstone_v_5vp_supplies),
    143	.consumer_supplies	= brownstone_v_5vp_supplies,
    144};
    145
    146static struct fixed_voltage_config brownstone_v_5vp = {
    147	.supply_name		= "v_5vp",
    148	.microvolts		= 5000000,
    149	.enabled_at_boot	= 1,
    150	.init_data		= &brownstone_v_5vp_data,
    151};
    152
    153static struct platform_device brownstone_v_5vp_device = {
    154	.name		= "reg-fixed-voltage",
    155	.id		= 1,
    156	.dev = {
    157		.platform_data = &brownstone_v_5vp,
    158	},
    159};
    160
    161static struct gpiod_lookup_table brownstone_v_5vp_gpiod_table = {
    162	.dev_id = "reg-fixed-voltage.1", /* .id set to 1 above */
    163	.table = {
    164		GPIO_LOOKUP("gpio-pxa", GPIO_5V_ENABLE,
    165			    NULL, GPIO_ACTIVE_HIGH),
    166		{ },
    167	},
    168};
    169
    170static struct max8925_platform_data brownstone_max8925_info = {
    171	.irq_base		= MMP_NR_IRQS,
    172};
    173
    174static struct i2c_board_info brownstone_twsi1_info[] = {
    175	[0] = {
    176		.type		= "max8649",
    177		.addr		= 0x60,
    178		.platform_data	= &brownstone_max8649_info,
    179	},
    180	[1] = {
    181		.type		= "max8925",
    182		.addr		= 0x3c,
    183		.irq		= IRQ_MMP2_PMIC,
    184		.platform_data	= &brownstone_max8925_info,
    185	},
    186};
    187
    188static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
    189	.clk_delay_cycles = 0x1f,
    190};
    191
    192static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc2 = {
    193	.clk_delay_cycles = 0x1f,
    194	.flags = PXA_FLAG_CARD_PERMANENT
    195		| PXA_FLAG_SD_8_BIT_CAPABLE_SLOT,
    196};
    197
    198static struct sram_platdata mmp2_asram_platdata = {
    199	.pool_name	= "asram",
    200	.granularity	= SRAM_GRANULARITY,
    201};
    202
    203static struct sram_platdata mmp2_isram_platdata = {
    204	.pool_name	= "isram",
    205	.granularity	= SRAM_GRANULARITY,
    206};
    207
    208static void __init brownstone_init(void)
    209{
    210	mfp_config(ARRAY_AND_SIZE(brownstone_pin_config));
    211
    212	/* on-chip devices */
    213	mmp2_add_uart(1);
    214	mmp2_add_uart(3);
    215	platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
    216				 sizeof(struct pxa_gpio_platform_data));
    217	platform_device_register(&mmp2_device_gpio);
    218	mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
    219	mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
    220	mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
    221	mmp2_add_asram(&mmp2_asram_platdata);
    222	mmp2_add_isram(&mmp2_isram_platdata);
    223
    224	/* enable 5v regulator */
    225	gpiod_add_lookup_table(&brownstone_v_5vp_gpiod_table);
    226	platform_device_register(&brownstone_v_5vp_device);
    227}
    228
    229MACHINE_START(BROWNSTONE, "Brownstone Development Platform")
    230	/* Maintainer: Haojian Zhuang <haojian.zhuang@marvell.com> */
    231	.map_io		= mmp_map_io,
    232	.nr_irqs	= BROWNSTONE_NR_IRQS,
    233	.init_irq	= mmp2_init_irq,
    234	.init_time	= mmp2_timer_init,
    235	.init_machine	= brownstone_init,
    236	.restart	= mmp_restart,
    237MACHINE_END