cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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common.c (1362B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  linux/arch/arm/mach-mmp/common.c
      4 *
      5 *  Code common to PXA168 processor lines
      6 */
      7
      8#include <linux/init.h>
      9#include <linux/kernel.h>
     10#include <linux/module.h>
     11
     12#include <asm/page.h>
     13#include <asm/mach/map.h>
     14#include <asm/system_misc.h>
     15#include "addr-map.h"
     16#include <linux/soc/mmp/cputype.h>
     17
     18#include "common.h"
     19
     20#define MMP_CHIPID	CIU_REG(0x00)
     21
     22unsigned int mmp_chip_id;
     23EXPORT_SYMBOL(mmp_chip_id);
     24
     25static struct map_desc standard_io_desc[] __initdata = {
     26	{
     27		.pfn		= __phys_to_pfn(APB_PHYS_BASE),
     28		.virtual	= (unsigned long)APB_VIRT_BASE,
     29		.length		= APB_PHYS_SIZE,
     30		.type		= MT_DEVICE,
     31	}, {
     32		.pfn		= __phys_to_pfn(AXI_PHYS_BASE),
     33		.virtual	= (unsigned long)AXI_VIRT_BASE,
     34		.length		= AXI_PHYS_SIZE,
     35		.type		= MT_DEVICE,
     36	},
     37};
     38
     39static struct map_desc mmp2_io_desc[] __initdata = {
     40	{
     41		.pfn		= __phys_to_pfn(PGU_PHYS_BASE),
     42		.virtual	= (unsigned long)PGU_VIRT_BASE,
     43		.length		= PGU_PHYS_SIZE,
     44		.type		= MT_DEVICE,
     45	},
     46};
     47
     48void __init mmp_map_io(void)
     49{
     50	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
     51
     52	/* this is early, initialize mmp_chip_id here */
     53	mmp_chip_id = __raw_readl(MMP_CHIPID);
     54}
     55
     56void __init mmp2_map_io(void)
     57{
     58	mmp_map_io();
     59	iotable_init(mmp2_io_desc, ARRAY_SIZE(mmp2_io_desc));
     60}
     61
     62void mmp_restart(enum reboot_mode mode, const char *cmd)
     63{
     64	soft_restart(0);
     65}