cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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jasper.c (4026B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *  linux/arch/arm/mach-mmp/jasper.c
      4 *
      5 *  Support for the Marvell Jasper Development Platform.
      6 *
      7 *  Copyright (C) 2009-2010 Marvell International Ltd.
      8 */
      9
     10#include <linux/init.h>
     11#include <linux/kernel.h>
     12#include <linux/gpio-pxa.h>
     13#include <linux/platform_device.h>
     14#include <linux/io.h>
     15#include <linux/regulator/machine.h>
     16#include <linux/regulator/max8649.h>
     17#include <linux/mfd/max8925.h>
     18#include <linux/interrupt.h>
     19
     20#include "irqs.h"
     21#include <asm/mach-types.h>
     22#include <asm/mach/arch.h>
     23#include "addr-map.h"
     24#include "mfp-mmp2.h"
     25#include "mmp2.h"
     26
     27#include "common.h"
     28
     29#define JASPER_NR_IRQS		(MMP_NR_IRQS + 48)
     30
     31static unsigned long jasper_pin_config[] __initdata = {
     32	/* UART1 */
     33	GPIO29_UART1_RXD,
     34	GPIO30_UART1_TXD,
     35
     36	/* UART3 */
     37	GPIO51_UART3_RXD,
     38	GPIO52_UART3_TXD,
     39
     40	/* DFI */
     41	GPIO168_DFI_D0,
     42	GPIO167_DFI_D1,
     43	GPIO166_DFI_D2,
     44	GPIO165_DFI_D3,
     45	GPIO107_DFI_D4,
     46	GPIO106_DFI_D5,
     47	GPIO105_DFI_D6,
     48	GPIO104_DFI_D7,
     49	GPIO111_DFI_D8,
     50	GPIO164_DFI_D9,
     51	GPIO163_DFI_D10,
     52	GPIO162_DFI_D11,
     53	GPIO161_DFI_D12,
     54	GPIO110_DFI_D13,
     55	GPIO109_DFI_D14,
     56	GPIO108_DFI_D15,
     57	GPIO143_ND_nCS0,
     58	GPIO144_ND_nCS1,
     59	GPIO147_ND_nWE,
     60	GPIO148_ND_nRE,
     61	GPIO150_ND_ALE,
     62	GPIO149_ND_CLE,
     63	GPIO112_ND_RDY0,
     64	GPIO160_ND_RDY1,
     65
     66	/* PMIC */
     67	PMIC_PMIC_INT | MFP_LPM_EDGE_FALL,
     68
     69	/* MMC1 */
     70	GPIO131_MMC1_DAT3,
     71	GPIO132_MMC1_DAT2,
     72	GPIO133_MMC1_DAT1,
     73	GPIO134_MMC1_DAT0,
     74	GPIO136_MMC1_CMD,
     75	GPIO139_MMC1_CLK,
     76	GPIO140_MMC1_CD,
     77	GPIO141_MMC1_WP,
     78
     79	/* MMC2 */
     80	GPIO37_MMC2_DAT3,
     81	GPIO38_MMC2_DAT2,
     82	GPIO39_MMC2_DAT1,
     83	GPIO40_MMC2_DAT0,
     84	GPIO41_MMC2_CMD,
     85	GPIO42_MMC2_CLK,
     86
     87	/* MMC3 */
     88	GPIO165_MMC3_DAT7,
     89	GPIO162_MMC3_DAT6,
     90	GPIO166_MMC3_DAT5,
     91	GPIO163_MMC3_DAT4,
     92	GPIO167_MMC3_DAT3,
     93	GPIO164_MMC3_DAT2,
     94	GPIO168_MMC3_DAT1,
     95	GPIO111_MMC3_DAT0,
     96	GPIO112_MMC3_CMD,
     97	GPIO151_MMC3_CLK,
     98};
     99
    100static struct pxa_gpio_platform_data mmp2_gpio_pdata = {
    101	.irq_base	= MMP_GPIO_TO_IRQ(0),
    102};
    103
    104static struct regulator_consumer_supply max8649_supply[] = {
    105	REGULATOR_SUPPLY("vcc_core", NULL),
    106};
    107
    108static struct regulator_init_data max8649_init_data = {
    109	.constraints	= {
    110		.name		= "vcc_core range",
    111		.min_uV		= 1150000,
    112		.max_uV		= 1280000,
    113		.always_on	= 1,
    114		.boot_on	= 1,
    115		.valid_ops_mask	= REGULATOR_CHANGE_VOLTAGE,
    116	},
    117	.num_consumer_supplies	= 1,
    118	.consumer_supplies	= &max8649_supply[0],
    119};
    120
    121static struct max8649_platform_data jasper_max8649_info = {
    122	.mode		= 2,	/* VID1 = 1, VID0 = 0 */
    123	.extclk		= 0,
    124	.ramp_timing	= MAX8649_RAMP_32MV,
    125	.regulator	= &max8649_init_data,
    126};
    127
    128static struct max8925_backlight_pdata jasper_backlight_data = {
    129	.dual_string	= 0,
    130};
    131
    132static struct max8925_power_pdata jasper_power_data = {
    133	.batt_detect		= 0,	/* can't detect battery by ID pin */
    134	.topoff_threshold	= MAX8925_TOPOFF_THR_10PER,
    135	.fast_charge		= MAX8925_FCHG_1000MA,
    136};
    137
    138static struct max8925_platform_data jasper_max8925_info = {
    139	.backlight		= &jasper_backlight_data,
    140	.power			= &jasper_power_data,
    141	.irq_base		= MMP_NR_IRQS,
    142};
    143
    144static struct i2c_board_info jasper_twsi1_info[] = {
    145	[0] = {
    146		.type		= "max8649",
    147		.addr		= 0x60,
    148		.platform_data	= &jasper_max8649_info,
    149	},
    150	[1] = {
    151		.type		= "max8925",
    152		.addr		= 0x3c,
    153		.irq		= IRQ_MMP2_PMIC,
    154		.platform_data	= &jasper_max8925_info,
    155	},
    156};
    157
    158static struct sdhci_pxa_platdata mmp2_sdh_platdata_mmc0 = {
    159	.clk_delay_cycles = 0x1f,
    160};
    161
    162static void __init jasper_init(void)
    163{
    164	mfp_config(ARRAY_AND_SIZE(jasper_pin_config));
    165
    166	/* on-chip devices */
    167	mmp2_add_uart(1);
    168	mmp2_add_uart(3);
    169	mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(jasper_twsi1_info));
    170	platform_device_add_data(&mmp2_device_gpio, &mmp2_gpio_pdata,
    171				 sizeof(struct pxa_gpio_platform_data));
    172	platform_device_register(&mmp2_device_gpio);
    173	mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
    174
    175	regulator_has_full_constraints();
    176}
    177
    178MACHINE_START(MARVELL_JASPER, "Jasper Development Platform")
    179	.map_io		= mmp_map_io,
    180	.nr_irqs	= JASPER_NR_IRQS,
    181	.init_irq       = mmp2_init_irq,
    182	.init_time	= mmp2_timer_init,
    183	.init_machine   = jasper_init,
    184	.restart	= mmp_restart,
    185MACHINE_END