cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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buffalo-wxl-setup.c (3212B)


      1/*
      2 * arch/arm/mach-mv78xx0/buffalo-wxl-setup.c
      3 *
      4 * Buffalo WXL (Terastation Duo) Setup routines
      5 *
      6 * sebastien requiem <sebastien@requiem.fr>
      7 *
      8 * This file is licensed under the terms of the GNU General Public
      9 * License version 2.  This program is licensed "as is" without any
     10 * warranty of any kind, whether express or implied.
     11 */
     12
     13#include <linux/kernel.h>
     14#include <linux/init.h>
     15#include <linux/platform_device.h>
     16#include <linux/ata_platform.h>
     17#include <linux/mv643xx_eth.h>
     18#include <linux/ethtool.h>
     19#include <linux/i2c.h>
     20#include <asm/mach-types.h>
     21#include <asm/mach/arch.h>
     22#include "mv78xx0.h"
     23#include "common.h"
     24#include "mpp.h"
     25
     26
     27/* This arch has 2 Giga Ethernet */
     28
     29static struct mv643xx_eth_platform_data db78x00_ge00_data = {
     30	.phy_addr	= MV643XX_ETH_PHY_ADDR(0),
     31};
     32
     33static struct mv643xx_eth_platform_data db78x00_ge01_data = {
     34	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),
     35};
     36
     37
     38/* 2 SATA controller supporting HotPlug */
     39
     40static struct mv_sata_platform_data db78x00_sata_data = {
     41	.n_ports	= 2,
     42};
     43
     44static struct i2c_board_info __initdata db78x00_i2c_rtc = {
     45	I2C_BOARD_INFO("ds1338", 0x68),
     46};
     47
     48
     49static unsigned int wxl_mpp_config[] __initdata = {
     50	MPP0_GE1_TXCLK,
     51	MPP1_GE1_TXCTL,
     52	MPP2_GE1_RXCTL,
     53	MPP3_GE1_RXCLK,
     54	MPP4_GE1_TXD0,
     55	MPP5_GE1_TXD1,
     56	MPP6_GE1_TXD2,
     57	MPP7_GE1_TXD3,
     58	MPP8_GE1_RXD0,
     59	MPP9_GE1_RXD1,
     60	MPP10_GE1_RXD2,
     61	MPP11_GE1_RXD3,
     62	MPP12_GPIO,
     63	MPP13_SYSRST_OUTn,
     64	MPP14_SATA1_ACTn,
     65	MPP15_SATA0_ACTn,
     66	MPP16_GPIO,
     67	MPP17_GPIO,
     68	MPP18_GPIO,
     69	MPP19_GPIO,
     70	MPP20_GPIO,
     71	MPP21_GPIO,
     72	MPP22_GPIO,
     73	MPP23_GPIO,
     74	MPP24_UA2_TXD,
     75	MPP25_UA2_RXD,
     76	MPP26_UA2_CTSn,
     77	MPP27_UA2_RTSn,
     78	MPP28_GPIO,
     79	MPP29_SYSRST_OUTn,
     80	MPP30_GPIO,
     81	MPP31_GPIO,
     82	MPP32_GPIO,
     83	MPP33_GPIO,
     84	MPP34_GPIO,
     85	MPP35_GPIO,
     86	MPP36_GPIO,
     87	MPP37_GPIO,
     88	MPP38_GPIO,
     89	MPP39_GPIO,
     90	MPP40_UNUSED,
     91	MPP41_UNUSED,
     92	MPP42_UNUSED,
     93	MPP43_UNUSED,
     94	MPP44_UNUSED,
     95	MPP45_UNUSED,
     96	MPP46_UNUSED,
     97	MPP47_UNUSED,
     98	MPP48_SATA1_ACTn,
     99	MPP49_SATA0_ACTn,
    100	0
    101};
    102
    103
    104static void __init wxl_init(void)
    105{
    106	/*
    107	 * Basic MV78xx0 setup. Needs to be called early.
    108	 */
    109	mv78xx0_init();
    110	mv78xx0_mpp_conf(wxl_mpp_config);
    111
    112	/*
    113	 * Partition on-chip peripherals between the two CPU cores.
    114	 */
    115	mv78xx0_ehci0_init();
    116	mv78xx0_ehci1_init();
    117	mv78xx0_ehci2_init();
    118	mv78xx0_ge00_init(&db78x00_ge00_data);
    119	mv78xx0_ge01_init(&db78x00_ge01_data);
    120	mv78xx0_sata_init(&db78x00_sata_data);
    121	mv78xx0_uart0_init();
    122	mv78xx0_uart1_init();
    123	mv78xx0_uart2_init();
    124	mv78xx0_uart3_init();
    125	mv78xx0_i2c_init();
    126	i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
    127}
    128
    129static int __init wxl_pci_init(void)
    130{
    131	if (machine_is_terastation_wxl()) {
    132		/*
    133		 * Assign the x16 PCIe slot on the board to CPU core
    134		 * #0, and let CPU core #1 have the four x1 slots.
    135		 */
    136		if (mv78xx0_core_index() == 0)
    137			mv78xx0_pcie_init(0, 1);
    138		else
    139			mv78xx0_pcie_init(1, 0);
    140	}
    141
    142	return 0;
    143}
    144subsys_initcall(wxl_pci_init);
    145
    146MACHINE_START(TERASTATION_WXL, "Buffalo Nas WXL")
    147	/* Maintainer: Sebastien Requiem <sebastien@requiem.fr> */
    148	.atag_offset	= 0x100,
    149	.nr_irqs	= MV78XX0_NR_IRQS,
    150	.init_machine	= wxl_init,
    151	.map_io		= mv78xx0_map_io,
    152	.init_early	= mv78xx0_init_early,
    153	.init_irq	= mv78xx0_init_irq,
    154	.init_time	= mv78xx0_timer_init,
    155	.restart	= mv78xx0_restart,
    156MACHINE_END