cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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db78x00-bp-setup.c (2586B)

      1/*
      2 * arch/arm/mach-mv78xx0/db78x00-bp-setup.c
      3 *
      4 * Marvell DB-78x00-BP Development Board Setup
      5 *
      6 * This file is licensed under the terms of the GNU General Public
      7 * License version 2.  This program is licensed "as is" without any
      8 * warranty of any kind, whether express or implied.
      9 */
     10
     11#include <linux/kernel.h>
     12#include <linux/init.h>
     13#include <linux/platform_device.h>
     14#include <linux/ata_platform.h>
     15#include <linux/mv643xx_eth.h>
     16#include <linux/ethtool.h>
     17#include <linux/i2c.h>
     18#include <asm/mach-types.h>
     19#include <asm/mach/arch.h>
     20#include "mv78xx0.h"
     21#include "common.h"
     22
     23static struct mv643xx_eth_platform_data db78x00_ge00_data = {
     24	.phy_addr	= MV643XX_ETH_PHY_ADDR(8),
     25};
     26
     27static struct mv643xx_eth_platform_data db78x00_ge01_data = {
     28	.phy_addr	= MV643XX_ETH_PHY_ADDR(9),
     29};
     30
     31static struct mv643xx_eth_platform_data db78x00_ge10_data = {
     32	.phy_addr	= MV643XX_ETH_PHY_ADDR(10),
     33};
     34
     35static struct mv643xx_eth_platform_data db78x00_ge11_data = {
     36	.phy_addr	= MV643XX_ETH_PHY_ADDR(11),
     37};
     38
     39static struct mv_sata_platform_data db78x00_sata_data = {
     40	.n_ports	= 2,
     41};
     42
     43static struct i2c_board_info __initdata db78x00_i2c_rtc = {
     44	I2C_BOARD_INFO("ds1338", 0x68),
     45};
     46
     47
     48static void __init db78x00_init(void)
     49{
     50	/*
     51	 * Basic MV78xx0 setup. Needs to be called early.
     52	 */
     53	mv78xx0_init();
     54
     55	/*
     56	 * Partition on-chip peripherals between the two CPU cores.
     57	 */
     58	if (mv78xx0_core_index() == 0) {
     59		mv78xx0_ehci0_init();
     60		mv78xx0_ehci1_init();
     61		mv78xx0_ehci2_init();
     62		mv78xx0_ge00_init(&db78x00_ge00_data);
     63		mv78xx0_ge01_init(&db78x00_ge01_data);
     64		mv78xx0_ge10_init(&db78x00_ge10_data);
     65		mv78xx0_ge11_init(&db78x00_ge11_data);
     66		mv78xx0_sata_init(&db78x00_sata_data);
     67		mv78xx0_uart0_init();
     68		mv78xx0_uart2_init();
     69		mv78xx0_i2c_init();
     70		i2c_register_board_info(0, &db78x00_i2c_rtc, 1);
     71	} else {
     72		mv78xx0_uart1_init();
     73		mv78xx0_uart3_init();
     74	}
     75}
     76
     77static int __init db78x00_pci_init(void)
     78{
     79	if (machine_is_db78x00_bp()) {
     80		/*
     81		 * Assign the x16 PCIe slot on the board to CPU core
     82		 * #0, and let CPU core #1 have the four x1 slots.
     83		 */
     84		if (mv78xx0_core_index() == 0)
     85			mv78xx0_pcie_init(0, 1);
     86		else
     87			mv78xx0_pcie_init(1, 0);
     88	}
     89
     90	return 0;
     91}
     92subsys_initcall(db78x00_pci_init);
     93
     94MACHINE_START(DB78X00_BP, "Marvell DB-78x00-BP Development Board")
     95	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
     96	.atag_offset	= 0x100,
     97	.nr_irqs	= MV78XX0_NR_IRQS,
     98	.init_machine	= db78x00_init,
     99	.map_io		= mv78xx0_map_io,
    100	.init_early	= mv78xx0_init_early,
    101	.init_irq	= mv78xx0_init_irq,
    102	.init_time	= mv78xx0_timer_init,
    103	.restart	= mv78xx0_restart,
    104MACHINE_END