cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ams-delta-fiq.h (1101B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2
      3/*
      4 * arch/arm/mach-omap1/ams-delta-fiq.h
      5 *
      6 * Taken from the original Amstrad modifications to fiq.h
      7 *
      8 * Copyright (c) 2004 Amstrad Plc
      9 * Copyright (c) 2006 Matt Callow
     10 * Copyright (c) 2010 Janusz Krzysztofik
     11 *
     12 * This program is free software; you can redistribute it and/or modify
     13 * it under the terms of the GNU General Public License version 2 as
     14 * published by the Free Software Foundation.
     15 */
     16#ifndef __AMS_DELTA_FIQ_H
     17#define __AMS_DELTA_FIQ_H
     18
     19#include "irqs.h"
     20
     21/*
     22 * Interrupt number used for passing control from FIQ to IRQ.
     23 * IRQ12, described as reserved, has been selected.
     24 */
     25#define INT_DEFERRED_FIQ	INT_1510_RES12
     26/*
     27 * Base address of an interrupt handler that the INT_DEFERRED_FIQ belongs to.
     28 */
     29#if (INT_DEFERRED_FIQ < IH2_BASE)
     30#define DEFERRED_FIQ_IH_BASE	OMAP_IH1_BASE
     31#else
     32#define DEFERRED_FIQ_IH_BASE	OMAP_IH2_BASE
     33#endif
     34
     35#ifndef __ASSEMBLER__
     36extern unsigned char qwerty_fiqin_start, qwerty_fiqin_end;
     37
     38extern void __init ams_delta_init_fiq(struct gpio_chip *chip,
     39				      struct platform_device *pdev);
     40#endif
     41
     42#endif