cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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board-h2.c (10566B)


      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * linux/arch/arm/mach-omap1/board-h2.c
      4 *
      5 * Board specific inits for OMAP-1610 H2
      6 *
      7 * Copyright (C) 2001 RidgeRun, Inc.
      8 * Author: Greg Lonnon <glonnon@ridgerun.com>
      9 *
     10 * Copyright (C) 2002 MontaVista Software, Inc.
     11 *
     12 * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
     13 * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
     14 *
     15 * H2 specific changes and cleanup
     16 * Copyright (C) 2004 Nokia Corporation by Imre Deak <imre.deak@nokia.com>
     17 */
     18#include <linux/gpio.h>
     19#include <linux/gpio/machine.h>
     20#include <linux/kernel.h>
     21#include <linux/platform_device.h>
     22#include <linux/delay.h>
     23#include <linux/i2c.h>
     24#include <linux/mtd/mtd.h>
     25#include <linux/mtd/platnand.h>
     26#include <linux/mtd/physmap.h>
     27#include <linux/input.h>
     28#include <linux/mfd/tps65010.h>
     29#include <linux/smc91x.h>
     30#include <linux/omapfb.h>
     31#include <linux/omap-dma.h>
     32#include <linux/platform_data/gpio-omap.h>
     33#include <linux/platform_data/keypad-omap.h>
     34#include <linux/leds.h>
     35
     36#include <asm/mach-types.h>
     37#include <asm/mach/arch.h>
     38#include <asm/mach/map.h>
     39
     40#include "tc.h"
     41#include "mux.h"
     42#include "flash.h"
     43#include "hardware.h"
     44#include "usb.h"
     45#include "common.h"
     46#include "board-h2.h"
     47
     48/* The first 16 SoC GPIO lines are on this GPIO chip */
     49#define OMAP_GPIO_LABEL			"gpio-0-15"
     50
     51/* At OMAP1610 Innovator the Ethernet is directly connected to CS1 */
     52#define OMAP1610_ETHR_START		0x04000300
     53
     54static const unsigned int h2_keymap[] = {
     55	KEY(0, 0, KEY_LEFT),
     56	KEY(1, 0, KEY_RIGHT),
     57	KEY(2, 0, KEY_3),
     58	KEY(3, 0, KEY_F10),
     59	KEY(4, 0, KEY_F5),
     60	KEY(5, 0, KEY_9),
     61	KEY(0, 1, KEY_DOWN),
     62	KEY(1, 1, KEY_UP),
     63	KEY(2, 1, KEY_2),
     64	KEY(3, 1, KEY_F9),
     65	KEY(4, 1, KEY_F7),
     66	KEY(5, 1, KEY_0),
     67	KEY(0, 2, KEY_ENTER),
     68	KEY(1, 2, KEY_6),
     69	KEY(2, 2, KEY_1),
     70	KEY(3, 2, KEY_F2),
     71	KEY(4, 2, KEY_F6),
     72	KEY(5, 2, KEY_HOME),
     73	KEY(0, 3, KEY_8),
     74	KEY(1, 3, KEY_5),
     75	KEY(2, 3, KEY_F12),
     76	KEY(3, 3, KEY_F3),
     77	KEY(4, 3, KEY_F8),
     78	KEY(5, 3, KEY_END),
     79	KEY(0, 4, KEY_7),
     80	KEY(1, 4, KEY_4),
     81	KEY(2, 4, KEY_F11),
     82	KEY(3, 4, KEY_F1),
     83	KEY(4, 4, KEY_F4),
     84	KEY(5, 4, KEY_ESC),
     85	KEY(0, 5, KEY_F13),
     86	KEY(1, 5, KEY_F14),
     87	KEY(2, 5, KEY_F15),
     88	KEY(3, 5, KEY_F16),
     89	KEY(4, 5, KEY_SLEEP),
     90};
     91
     92static struct mtd_partition h2_nor_partitions[] = {
     93	/* bootloader (U-Boot, etc) in first sector */
     94	{
     95	      .name		= "bootloader",
     96	      .offset		= 0,
     97	      .size		= SZ_128K,
     98	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
     99	},
    100	/* bootloader params in the next sector */
    101	{
    102	      .name		= "params",
    103	      .offset		= MTDPART_OFS_APPEND,
    104	      .size		= SZ_128K,
    105	      .mask_flags	= 0,
    106	},
    107	/* kernel */
    108	{
    109	      .name		= "kernel",
    110	      .offset		= MTDPART_OFS_APPEND,
    111	      .size		= SZ_2M,
    112	      .mask_flags	= 0
    113	},
    114	/* file system */
    115	{
    116	      .name		= "filesystem",
    117	      .offset		= MTDPART_OFS_APPEND,
    118	      .size		= MTDPART_SIZ_FULL,
    119	      .mask_flags	= 0
    120	}
    121};
    122
    123static struct physmap_flash_data h2_nor_data = {
    124	.width		= 2,
    125	.set_vpp	= omap1_set_vpp,
    126	.parts		= h2_nor_partitions,
    127	.nr_parts	= ARRAY_SIZE(h2_nor_partitions),
    128};
    129
    130static struct resource h2_nor_resource = {
    131	/* This is on CS3, wherever it's mapped */
    132	.flags		= IORESOURCE_MEM,
    133};
    134
    135static struct platform_device h2_nor_device = {
    136	.name		= "physmap-flash",
    137	.id		= 0,
    138	.dev		= {
    139		.platform_data	= &h2_nor_data,
    140	},
    141	.num_resources	= 1,
    142	.resource	= &h2_nor_resource,
    143};
    144
    145static struct mtd_partition h2_nand_partitions[] = {
    146#if 0
    147	/* REVISIT:  enable these partitions if you make NAND BOOT
    148	 * work on your H2 (rev C or newer); published versions of
    149	 * x-load only support P2 and H3.
    150	 */
    151	{
    152		.name		= "xloader",
    153		.offset		= 0,
    154		.size		= 64 * 1024,
    155		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
    156	},
    157	{
    158		.name		= "bootloader",
    159		.offset		= MTDPART_OFS_APPEND,
    160		.size		= 256 * 1024,
    161		.mask_flags	= MTD_WRITEABLE,	/* force read-only */
    162	},
    163	{
    164		.name		= "params",
    165		.offset		= MTDPART_OFS_APPEND,
    166		.size		= 192 * 1024,
    167	},
    168	{
    169		.name		= "kernel",
    170		.offset		= MTDPART_OFS_APPEND,
    171		.size		= 2 * SZ_1M,
    172	},
    173#endif
    174	{
    175		.name		= "filesystem",
    176		.size		= MTDPART_SIZ_FULL,
    177		.offset		= MTDPART_OFS_APPEND,
    178	},
    179};
    180
    181#define H2_NAND_RB_GPIO_PIN	62
    182
    183static int h2_nand_dev_ready(struct nand_chip *chip)
    184{
    185	return gpio_get_value(H2_NAND_RB_GPIO_PIN);
    186}
    187
    188static struct platform_nand_data h2_nand_platdata = {
    189	.chip	= {
    190		.nr_chips		= 1,
    191		.chip_offset		= 0,
    192		.nr_partitions		= ARRAY_SIZE(h2_nand_partitions),
    193		.partitions		= h2_nand_partitions,
    194		.options		= NAND_SAMSUNG_LP_OPTIONS,
    195	},
    196	.ctrl	= {
    197		.cmd_ctrl	= omap1_nand_cmd_ctl,
    198		.dev_ready	= h2_nand_dev_ready,
    199	},
    200};
    201
    202static struct resource h2_nand_resource = {
    203	.flags		= IORESOURCE_MEM,
    204};
    205
    206static struct platform_device h2_nand_device = {
    207	.name		= "gen_nand",
    208	.id		= 0,
    209	.dev		= {
    210		.platform_data	= &h2_nand_platdata,
    211	},
    212	.num_resources	= 1,
    213	.resource	= &h2_nand_resource,
    214};
    215
    216static struct smc91x_platdata h2_smc91x_info = {
    217	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
    218	.leda	= RPC_LED_100_10,
    219	.ledb	= RPC_LED_TX_RX,
    220};
    221
    222static struct resource h2_smc91x_resources[] = {
    223	[0] = {
    224		.start	= OMAP1610_ETHR_START,		/* Physical */
    225		.end	= OMAP1610_ETHR_START + 0xf,
    226		.flags	= IORESOURCE_MEM,
    227	},
    228	[1] = {
    229		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
    230	},
    231};
    232
    233static struct platform_device h2_smc91x_device = {
    234	.name		= "smc91x",
    235	.id		= 0,
    236	.dev	= {
    237		.platform_data	= &h2_smc91x_info,
    238	},
    239	.num_resources	= ARRAY_SIZE(h2_smc91x_resources),
    240	.resource	= h2_smc91x_resources,
    241};
    242
    243static struct resource h2_kp_resources[] = {
    244	[0] = {
    245		.start	= INT_KEYBOARD,
    246		.end	= INT_KEYBOARD,
    247		.flags	= IORESOURCE_IRQ,
    248	},
    249};
    250
    251static const struct matrix_keymap_data h2_keymap_data = {
    252	.keymap		= h2_keymap,
    253	.keymap_size	= ARRAY_SIZE(h2_keymap),
    254};
    255
    256static struct omap_kp_platform_data h2_kp_data = {
    257	.rows		= 8,
    258	.cols		= 8,
    259	.keymap_data	= &h2_keymap_data,
    260	.rep		= true,
    261	.delay		= 9,
    262	.dbounce	= true,
    263};
    264
    265static struct platform_device h2_kp_device = {
    266	.name		= "omap-keypad",
    267	.id		= -1,
    268	.dev		= {
    269		.platform_data = &h2_kp_data,
    270	},
    271	.num_resources	= ARRAY_SIZE(h2_kp_resources),
    272	.resource	= h2_kp_resources,
    273};
    274
    275static const struct gpio_led h2_gpio_led_pins[] = {
    276	{
    277		.name		= "h2:red",
    278		.default_trigger = "heartbeat",
    279		.gpio		= 3,
    280	},
    281	{
    282		.name		= "h2:green",
    283		.default_trigger = "cpu0",
    284		.gpio		= OMAP_MPUIO(4),
    285	},
    286};
    287
    288static struct gpio_led_platform_data h2_gpio_led_data = {
    289	.leds		= h2_gpio_led_pins,
    290	.num_leds	= ARRAY_SIZE(h2_gpio_led_pins),
    291};
    292
    293static struct platform_device h2_gpio_leds = {
    294	.name	= "leds-gpio",
    295	.id	= -1,
    296	.dev	= {
    297		.platform_data = &h2_gpio_led_data,
    298	},
    299};
    300
    301static struct platform_device *h2_devices[] __initdata = {
    302	&h2_nor_device,
    303	&h2_nand_device,
    304	&h2_smc91x_device,
    305	&h2_kp_device,
    306	&h2_gpio_leds,
    307};
    308
    309static void __init h2_init_smc91x(void)
    310{
    311	if (gpio_request(0, "SMC91x irq") < 0) {
    312		printk("Error requesting gpio 0 for smc91x irq\n");
    313		return;
    314	}
    315}
    316
    317static int tps_setup(struct i2c_client *client, void *context)
    318{
    319	if (!IS_BUILTIN(CONFIG_TPS65010))
    320		return -ENOSYS;
    321
    322	tps65010_config_vregs1(TPS_LDO2_ENABLE | TPS_VLDO2_3_0V |
    323				TPS_LDO1_ENABLE | TPS_VLDO1_3_0V);
    324
    325	return 0;
    326}
    327
    328static struct tps65010_board tps_board = {
    329	.base		= H2_TPS_GPIO_BASE,
    330	.outmask	= 0x0f,
    331	.setup		= tps_setup,
    332};
    333
    334static struct i2c_board_info __initdata h2_i2c_board_info[] = {
    335	{
    336		I2C_BOARD_INFO("tps65010", 0x48),
    337		.platform_data	= &tps_board,
    338	}, {
    339		.type = "isp1301_omap",
    340		.addr = 0x2d,
    341		.dev_name = "isp1301",
    342	},
    343};
    344
    345static struct gpiod_lookup_table isp1301_gpiod_table = {
    346	.dev_id = "isp1301",
    347	.table = {
    348		/* Active low since the irq triggers on falling edge */
    349		GPIO_LOOKUP(OMAP_GPIO_LABEL, 2,
    350			    NULL, GPIO_ACTIVE_LOW),
    351		{ },
    352	},
    353};
    354
    355static struct omap_usb_config h2_usb_config __initdata = {
    356	/* usb1 has a Mini-AB port and external isp1301 transceiver */
    357	.otg		= 2,
    358
    359#if IS_ENABLED(CONFIG_USB_OMAP)
    360	.hmc_mode	= 19,	/* 0:host(off) 1:dev|otg 2:disabled */
    361	/* .hmc_mode	= 21,*/	/* 0:host(off) 1:dev(loopback) 2:host(loopback) */
    362#elif	IS_ENABLED(CONFIG_USB_OHCI_HCD)
    363	/* needs OTG cable, or NONSTANDARD (B-to-MiniB) */
    364	.hmc_mode	= 20,	/* 1:dev|otg(off) 1:host 2:disabled */
    365#endif
    366
    367	.pins[1]	= 3,
    368};
    369
    370static const struct omap_lcd_config h2_lcd_config __initconst = {
    371	.ctrl_name	= "internal",
    372};
    373
    374static void __init h2_init(void)
    375{
    376	h2_init_smc91x();
    377
    378	/* Here we assume the NOR boot config:  NOR on CS3 (possibly swapped
    379	 * to address 0 by a dip switch), NAND on CS2B.  The NAND driver will
    380	 * notice whether a NAND chip is enabled at probe time.
    381	 *
    382	 * FIXME revC boards (and H3) support NAND-boot, with a dip switch to
    383	 * put NOR on CS2B and NAND (which on H2 may be 16bit) on CS3.  Try
    384	 * detecting that in code here, to avoid probing every possible flash
    385	 * configuration...
    386	 */
    387	h2_nor_resource.end = h2_nor_resource.start = omap_cs3_phys();
    388	h2_nor_resource.end += SZ_32M - 1;
    389
    390	h2_nand_resource.end = h2_nand_resource.start = OMAP_CS2B_PHYS;
    391	h2_nand_resource.end += SZ_4K - 1;
    392	BUG_ON(gpio_request(H2_NAND_RB_GPIO_PIN, "NAND ready") < 0);
    393	gpio_direction_input(H2_NAND_RB_GPIO_PIN);
    394
    395	gpiod_add_lookup_table(&isp1301_gpiod_table);
    396
    397	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
    398	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
    399
    400	/* MMC:  card detect and WP */
    401	/* omap_cfg_reg(U19_ARMIO1); */		/* CD */
    402	omap_cfg_reg(BALLOUT_V8_ARMIO3);	/* WP */
    403
    404	/* Mux pins for keypad */
    405	omap_cfg_reg(F18_1610_KBC0);
    406	omap_cfg_reg(D20_1610_KBC1);
    407	omap_cfg_reg(D19_1610_KBC2);
    408	omap_cfg_reg(E18_1610_KBC3);
    409	omap_cfg_reg(C21_1610_KBC4);
    410	omap_cfg_reg(G18_1610_KBR0);
    411	omap_cfg_reg(F19_1610_KBR1);
    412	omap_cfg_reg(H14_1610_KBR2);
    413	omap_cfg_reg(E20_1610_KBR3);
    414	omap_cfg_reg(E19_1610_KBR4);
    415	omap_cfg_reg(N19_1610_KBR5);
    416
    417	/* GPIO based LEDs */
    418	omap_cfg_reg(P18_1610_GPIO3);
    419	omap_cfg_reg(MPUIO4);
    420
    421	h2_smc91x_resources[1].start = gpio_to_irq(0);
    422	h2_smc91x_resources[1].end = gpio_to_irq(0);
    423	platform_add_devices(h2_devices, ARRAY_SIZE(h2_devices));
    424	omap_serial_init();
    425
    426	/* ISP1301 IRQ wired at M14 */
    427	omap_cfg_reg(M14_1510_GPIO2);
    428	h2_i2c_board_info[0].irq = gpio_to_irq(58);
    429	omap_register_i2c_bus(1, 100, h2_i2c_board_info,
    430			      ARRAY_SIZE(h2_i2c_board_info));
    431	omap1_usb_init(&h2_usb_config);
    432	h2_mmc_init();
    433
    434	omapfb_set_lcd_config(&h2_lcd_config);
    435}
    436
    437MACHINE_START(OMAP_H2, "TI-H2")
    438	/* Maintainer: Imre Deak <imre.deak@nokia.com> */
    439	.atag_offset	= 0x100,
    440	.map_io		= omap16xx_map_io,
    441	.init_early     = omap1_init_early,
    442	.init_irq	= omap1_init_irq,
    443	.handle_irq	= omap1_handle_irq,
    444	.init_machine	= h2_init,
    445	.init_late	= omap1_init_late,
    446	.init_time	= omap1_timer_init,
    447	.restart	= omap1_restart,
    448MACHINE_END