cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

common.h (2837B)

      1/*
      2 *
      3 * Header for code common to all OMAP1 machines.
      4 *
      5 * This program is free software; you can redistribute it and/or modify it
      6 * under the terms of the GNU General Public License as published by the
      7 * Free Software Foundation; either version 2 of the License, or (at your
      8 * option) any later version.
      9 *
     10 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
     11 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     12 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
     13 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     14 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     15 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
     16 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
     17 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     18 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     19 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     20 *
     21 * You should have received a copy of the  GNU General Public License along
     22 * with this program; if not, write  to the Free Software Foundation, Inc.,
     23 * 675 Mass Ave, Cambridge, MA 02139, USA.
     24 */
     25
     26#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
     27#define __ARCH_ARM_MACH_OMAP1_COMMON_H
     28
     29#include <linux/platform_data/i2c-omap.h>
     30#include <linux/reboot.h>
     31
     32#include <asm/exception.h>
     33
     34#include "irqs.h"
     35#include "soc.h"
     36#include "i2c.h"
     37
     38#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
     39void omap7xx_map_io(void);
     40#else
     41static inline void omap7xx_map_io(void)
     42{
     43}
     44#endif
     45
     46#ifdef CONFIG_ARCH_OMAP15XX
     47void omap1510_fpga_init_irq(void);
     48void omap15xx_map_io(void);
     49#else
     50static inline void omap1510_fpga_init_irq(void)
     51{
     52}
     53static inline void omap15xx_map_io(void)
     54{
     55}
     56#endif
     57
     58#ifdef CONFIG_ARCH_OMAP16XX
     59void omap16xx_map_io(void);
     60#else
     61static inline void omap16xx_map_io(void)
     62{
     63}
     64#endif
     65
     66#ifdef CONFIG_OMAP_SERIAL_WAKE
     67int omap_serial_wakeup_init(void);
     68#else
     69static inline int omap_serial_wakeup_init(void)
     70{
     71	return 0;
     72}
     73#endif
     74
     75void omap1_init_early(void);
     76void omap1_init_irq(void);
     77void __exception_irq_entry omap1_handle_irq(struct pt_regs *regs);
     78void omap1_init_late(void);
     79void omap1_restart(enum reboot_mode, const char *);
     80
     81extern void __init omap_check_revision(void);
     82
     83struct nand_chip;
     84extern void omap1_nand_cmd_ctl(struct nand_chip *this, int cmd,
     85			       unsigned int ctrl);
     86
     87extern void omap1_timer_init(void);
     88#ifdef CONFIG_OMAP_32K_TIMER
     89extern int omap_32k_timer_init(void);
     90#else
     91static inline int __init omap_32k_timer_init(void)
     92{
     93	return -ENODEV;
     94}
     95#endif
     96
     97#ifdef CONFIG_ARCH_OMAP16XX
     98extern int ocpi_enable(void);
     99#else
    100static inline int ocpi_enable(void) { return 0; }
    101#endif
    102
    103extern u32 omap1_get_reset_sources(void);
    104
    105#endif /* __ARCH_ARM_MACH_OMAP1_COMMON_H */