gpio15xx.c (3222B)
1/* 2 * OMAP15xx specific gpio init 3 * 4 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/ 5 * 6 * Author: 7 * Charulatha V <charu@ti.com> 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License as 11 * published by the Free Software Foundation version 2. 12 * 13 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 14 * kind, whether express or implied; without even the implied warranty 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19#include <linux/gpio.h> 20#include <linux/platform_data/gpio-omap.h> 21#include <linux/soc/ti/omap1-soc.h> 22 23#include "irqs.h" 24 25#define OMAP1_MPUIO_VBASE OMAP1_MPUIO_BASE 26#define OMAP1510_GPIO_BASE 0xFFFCE000 27 28/* gpio1 */ 29static struct resource omap15xx_mpu_gpio_resources[] = { 30 { 31 .start = OMAP1_MPUIO_VBASE, 32 .end = OMAP1_MPUIO_VBASE + SZ_2K - 1, 33 .flags = IORESOURCE_MEM, 34 }, 35 { 36 .start = INT_MPUIO, 37 .flags = IORESOURCE_IRQ, 38 }, 39}; 40 41static struct omap_gpio_reg_offs omap15xx_mpuio_regs = { 42 .revision = USHRT_MAX, 43 .direction = OMAP_MPUIO_IO_CNTL, 44 .datain = OMAP_MPUIO_INPUT_LATCH, 45 .dataout = OMAP_MPUIO_OUTPUT, 46 .irqstatus = OMAP_MPUIO_GPIO_INT, 47 .irqenable = OMAP_MPUIO_GPIO_MASKIT, 48 .irqenable_inv = true, 49 .irqctrl = OMAP_MPUIO_GPIO_INT_EDGE, 50}; 51 52static struct omap_gpio_platform_data omap15xx_mpu_gpio_config = { 53 .is_mpuio = true, 54 .bank_width = 16, 55 .bank_stride = 1, 56 .regs = &omap15xx_mpuio_regs, 57}; 58 59static struct platform_device omap15xx_mpu_gpio = { 60 .name = "omap_gpio", 61 .id = 0, 62 .dev = { 63 .platform_data = &omap15xx_mpu_gpio_config, 64 }, 65 .num_resources = ARRAY_SIZE(omap15xx_mpu_gpio_resources), 66 .resource = omap15xx_mpu_gpio_resources, 67}; 68 69/* gpio2 */ 70static struct resource omap15xx_gpio_resources[] = { 71 { 72 .start = OMAP1510_GPIO_BASE, 73 .end = OMAP1510_GPIO_BASE + SZ_2K - 1, 74 .flags = IORESOURCE_MEM, 75 }, 76 { 77 .start = INT_GPIO_BANK1, 78 .flags = IORESOURCE_IRQ, 79 }, 80}; 81 82static struct omap_gpio_reg_offs omap15xx_gpio_regs = { 83 .revision = USHRT_MAX, 84 .direction = OMAP1510_GPIO_DIR_CONTROL, 85 .datain = OMAP1510_GPIO_DATA_INPUT, 86 .dataout = OMAP1510_GPIO_DATA_OUTPUT, 87 .irqstatus = OMAP1510_GPIO_INT_STATUS, 88 .irqenable = OMAP1510_GPIO_INT_MASK, 89 .irqenable_inv = true, 90 .irqctrl = OMAP1510_GPIO_INT_CONTROL, 91 .pinctrl = OMAP1510_GPIO_PIN_CONTROL, 92}; 93 94static struct omap_gpio_platform_data omap15xx_gpio_config = { 95 .bank_width = 16, 96 .regs = &omap15xx_gpio_regs, 97}; 98 99static struct platform_device omap15xx_gpio = { 100 .name = "omap_gpio", 101 .id = 1, 102 .dev = { 103 .platform_data = &omap15xx_gpio_config, 104 }, 105 .num_resources = ARRAY_SIZE(omap15xx_gpio_resources), 106 .resource = omap15xx_gpio_resources, 107}; 108 109/* 110 * omap15xx_gpio_init needs to be done before 111 * machine_init functions access gpio APIs. 112 * Hence omap15xx_gpio_init is a postcore_initcall. 113 */ 114static int __init omap15xx_gpio_init(void) 115{ 116 if (!cpu_is_omap15xx()) 117 return -EINVAL; 118 119 platform_device_register(&omap15xx_mpu_gpio); 120 platform_device_register(&omap15xx_gpio); 121 122 return 0; 123} 124postcore_initcall(omap15xx_gpio_init);