cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tc.h (2222B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * OMAP Traffic Controller
      4 *
      5 * Copyright (C) 2004 Nokia Corporation
      6 * Author: Imre Deak <imre.deak@nokia.com>
      7 */
      8
      9#ifndef __ASM_ARCH_TC_H
     10#define __ASM_ARCH_TC_H
     11
     12#define TCMIF_BASE		0xfffecc00
     13#define OMAP_TC_OCPT1_PRIOR	(TCMIF_BASE + 0x00)
     14#define OMAP_TC_EMIFS_PRIOR	(TCMIF_BASE + 0x04)
     15#define OMAP_TC_EMIFF_PRIOR	(TCMIF_BASE + 0x08)
     16#define EMIFS_CONFIG		(TCMIF_BASE + 0x0c)
     17#define EMIFS_CS0_CONFIG	(TCMIF_BASE + 0x10)
     18#define EMIFS_CS1_CONFIG	(TCMIF_BASE + 0x14)
     19#define EMIFS_CS2_CONFIG	(TCMIF_BASE + 0x18)
     20#define EMIFS_CS3_CONFIG	(TCMIF_BASE + 0x1c)
     21#define EMIFF_SDRAM_CONFIG	(TCMIF_BASE + 0x20)
     22#define EMIFF_MRS		(TCMIF_BASE + 0x24)
     23#define TC_TIMEOUT1		(TCMIF_BASE + 0x28)
     24#define TC_TIMEOUT2		(TCMIF_BASE + 0x2c)
     25#define TC_TIMEOUT3		(TCMIF_BASE + 0x30)
     26#define TC_ENDIANISM		(TCMIF_BASE + 0x34)
     27#define EMIFF_SDRAM_CONFIG_2	(TCMIF_BASE + 0x3c)
     28#define EMIF_CFG_DYNAMIC_WS	(TCMIF_BASE + 0x40)
     29#define EMIFS_ACS0		(TCMIF_BASE + 0x50)
     30#define EMIFS_ACS1		(TCMIF_BASE + 0x54)
     31#define EMIFS_ACS2		(TCMIF_BASE + 0x58)
     32#define EMIFS_ACS3		(TCMIF_BASE + 0x5c)
     33#define OMAP_TC_OCPT2_PRIOR	(TCMIF_BASE + 0xd0)
     34
     35/* external EMIFS chipselect regions */
     36#define	OMAP_CS0_PHYS		0x00000000
     37#define	OMAP_CS0_SIZE		SZ_64M
     38
     39#define	OMAP_CS1_PHYS		0x04000000
     40#define	OMAP_CS1_SIZE		SZ_64M
     41
     42#define	OMAP_CS1A_PHYS		OMAP_CS1_PHYS
     43#define	OMAP_CS1A_SIZE		SZ_32M
     44
     45#define	OMAP_CS1B_PHYS		(OMAP_CS1A_PHYS + OMAP_CS1A_SIZE)
     46#define	OMAP_CS1B_SIZE		SZ_32M
     47
     48#define	OMAP_CS2_PHYS		0x08000000
     49#define	OMAP_CS2_SIZE		SZ_64M
     50
     51#define	OMAP_CS2A_PHYS		OMAP_CS2_PHYS
     52#define	OMAP_CS2A_SIZE		SZ_32M
     53
     54#define	OMAP_CS2B_PHYS		(OMAP_CS2A_PHYS + OMAP_CS2A_SIZE)
     55#define	OMAP_CS2B_SIZE		SZ_32M
     56
     57#define	OMAP_CS3_PHYS		0x0c000000
     58#define	OMAP_CS3_SIZE		SZ_64M
     59
     60#ifndef	__ASSEMBLER__
     61
     62/* EMIF Slow Interface Configuration Register */
     63#define OMAP_EMIFS_CONFIG_FR		(1 << 4)
     64#define OMAP_EMIFS_CONFIG_PDE		(1 << 3)
     65#define OMAP_EMIFS_CONFIG_PWD_EN	(1 << 2)
     66#define OMAP_EMIFS_CONFIG_BM		(1 << 1)
     67#define OMAP_EMIFS_CONFIG_WP		(1 << 0)
     68
     69#define EMIFS_CCS(n)		(EMIFS_CS0_CONFIG + (4 * (n)))
     70#define EMIFS_ACS(n)		(EMIFS_ACS0 + (4 * (n)))
     71
     72#endif	/* __ASSEMBLER__ */
     73
     74#endif	/* __ASM_ARCH_TC_H */