cm-regbits-24xx.h (1842B)
1/* SPDX-License-Identifier: GPL-2.0-only */ 2#ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H 3#define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_24XX_H 4 5/* 6 * OMAP24XX Clock Management register bits 7 * 8 * Copyright (C) 2007 Texas Instruments, Inc. 9 * Copyright (C) 2007 Nokia Corporation 10 * 11 * Written by Paul Walmsley 12 */ 13 14#define OMAP24XX_AUTOSTATE_MPU_MASK (1 << 0) 15#define OMAP24XX_EN_DSS1_MASK (1 << 0) 16#define OMAP24XX_ST_MAILBOXES_SHIFT 30 17#define OMAP24XX_ST_HDQ_SHIFT 23 18#define OMAP2420_ST_I2C2_SHIFT 20 19#define OMAP2430_ST_I2CHS1_SHIFT 19 20#define OMAP2420_ST_I2C1_SHIFT 19 21#define OMAP2430_ST_I2CHS2_SHIFT 20 22#define OMAP24XX_ST_MCBSP2_SHIFT 16 23#define OMAP24XX_ST_MCBSP1_SHIFT 15 24#define OMAP2430_ST_MCBSP5_SHIFT 5 25#define OMAP2430_ST_MCBSP4_SHIFT 4 26#define OMAP2430_ST_MCBSP3_SHIFT 3 27#define OMAP24XX_ST_AES_SHIFT 3 28#define OMAP24XX_ST_RNG_SHIFT 2 29#define OMAP24XX_ST_SHA_SHIFT 1 30#define OMAP24XX_CLKSEL_DSS2_MASK (0x1 << 13) 31#define OMAP24XX_AUTOSTATE_DSS_MASK (1 << 2) 32#define OMAP24XX_AUTOSTATE_L4_MASK (1 << 1) 33#define OMAP24XX_AUTOSTATE_L3_MASK (1 << 0) 34#define OMAP24XX_AUTOSTATE_GFX_MASK (1 << 0) 35#define OMAP24XX_ST_MPU_WDT_SHIFT 3 36#define OMAP24XX_ST_32KSYNC_SHIFT 1 37#define OMAP24XX_EN_54M_PLL_SHIFT 6 38#define OMAP24XX_EN_96M_PLL_SHIFT 2 39#define OMAP24XX_ST_54M_APLL_SHIFT 9 40#define OMAP24XX_ST_96M_APLL_SHIFT 8 41#define OMAP24XX_AUTO_54M_MASK (0x3 << 6) 42#define OMAP24XX_AUTO_96M_MASK (0x3 << 2) 43#define OMAP24XX_AUTO_DPLL_SHIFT 0 44#define OMAP24XX_AUTO_DPLL_MASK (0x3 << 0) 45#define OMAP24XX_CORE_CLK_SRC_MASK (0x3 << 0) 46#define OMAP2420_AUTOSTATE_IVA_MASK (1 << 8) 47#define OMAP24XX_AUTOSTATE_DSP_MASK (1 << 0) 48#define OMAP2430_AUTOSTATE_MDM_MASK (1 << 0) 49#define OMAP24XX_CLKSTCTRL_DISABLE_AUTO 0x0 50#define OMAP24XX_CLKSTCTRL_ENABLE_AUTO 0x1 51#endif