cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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cm1_44xx.h (1395B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * OMAP44xx CM1 instance offset macros
      4 *
      5 * Copyright (C) 2009-2011 Texas Instruments, Inc.
      6 * Copyright (C) 2009-2010 Nokia Corporation
      7 *
      8 * Paul Walmsley (paul@pwsan.com)
      9 * Rajendra Nayak (rnayak@ti.com)
     10 * Benoit Cousson (b-cousson@ti.com)
     11 *
     12 * This file is automatically generated from the OMAP hardware databases.
     13 * We respectfully ask that any modifications to this file be coordinated
     14 * with the public linux-omap@vger.kernel.org mailing list and the
     15 * authors above to ensure that the autogeneration scripts are kept
     16 * up-to-date with the file contents.
     17 *
     18 * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX",
     19 *     or "OMAP4430".
     20 */
     21
     22#ifndef __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
     23#define __ARCH_ARM_MACH_OMAP2_CM1_44XX_H
     24
     25/* CM1 base address */
     26#define OMAP4430_CM1_BASE		0x4a004000
     27
     28#define OMAP44XX_CM1_REGADDR(inst, reg)				\
     29	OMAP2_L4_IO_ADDRESS(OMAP4430_CM1_BASE + (inst) + (reg))
     30
     31/* CM1 instances */
     32#define OMAP4430_CM1_OCP_SOCKET_INST	0x0000
     33#define OMAP4430_CM1_CKGEN_INST		0x0100
     34#define OMAP4430_CM1_MPU_INST		0x0300
     35#define OMAP4430_CM1_TESLA_INST		0x0400
     36#define OMAP4430_CM1_ABE_INST		0x0500
     37
     38/* CM1 clockdomain register offsets (from instance start) */
     39#define OMAP4430_CM1_MPU_MPU_CDOFFS	0x0000
     40#define OMAP4430_CM1_TESLA_TESLA_CDOFFS	0x0000
     41#define OMAP4430_CM1_ABE_ABE_CDOFFS	0x0000
     42
     43#endif