common.h (9843B)
1/* 2 * Header for code common to all OMAP2+ machines. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED 10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 19 * 20 * You should have received a copy of the GNU General Public License along 21 * with this program; if not, write to the Free Software Foundation, Inc., 22 * 675 Mass Ave, Cambridge, MA 02139, USA. 23 */ 24 25#ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 26#define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H 27#ifndef __ASSEMBLER__ 28 29#include <linux/irq.h> 30#include <linux/delay.h> 31#include <linux/i2c.h> 32#include <linux/mfd/twl.h> 33#include <linux/platform_data/i2c-omap.h> 34#include <linux/reboot.h> 35#include <linux/irqchip/irq-omap-intc.h> 36 37#include <asm/proc-fns.h> 38#include <asm/hardware/cache-l2x0.h> 39 40#include "i2c.h" 41#include "serial.h" 42 43#include "usb.h" 44 45#define OMAP_INTC_START NR_IRQS 46 47extern int (*omap_pm_soc_init)(void); 48int omap_pm_nop_init(void); 49 50#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2) 51int omap2_pm_init(void); 52#else 53static inline int omap2_pm_init(void) 54{ 55 return 0; 56} 57#endif 58 59#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 60int omap3_pm_init(void); 61#else 62static inline int omap3_pm_init(void) 63{ 64 return 0; 65} 66#endif 67 68#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX)) 69int omap4_pm_init(void); 70int omap4_pm_init_early(void); 71#else 72static inline int omap4_pm_init(void) 73{ 74 return 0; 75} 76 77static inline int omap4_pm_init_early(void) 78{ 79 return 0; 80} 81#endif 82 83#if defined(CONFIG_PM) && (defined(CONFIG_SOC_AM33XX) || \ 84 defined(CONFIG_SOC_AM43XX)) 85int amx3_common_pm_init(void); 86#else 87static inline int amx3_common_pm_init(void) 88{ 89 return 0; 90} 91#endif 92 93extern void omap2_init_common_infrastructure(void); 94 95extern void omap_init_time(void); 96extern void omap3_secure_sync32k_timer_init(void); 97extern void omap3_gptimer_timer_init(void); 98extern void omap4_local_timer_init(void); 99#ifdef CONFIG_CACHE_L2X0 100int omap_l2_cache_init(void); 101#define OMAP_L2C_AUX_CTRL (L2C_AUX_CTRL_SHARED_OVERRIDE | \ 102 L310_AUX_CTRL_DATA_PREFETCH | \ 103 L310_AUX_CTRL_INSTR_PREFETCH) 104void omap4_l2c310_write_sec(unsigned long val, unsigned reg); 105#else 106static inline int omap_l2_cache_init(void) 107{ 108 return 0; 109} 110 111#define OMAP_L2C_AUX_CTRL 0 112#define omap4_l2c310_write_sec NULL 113#endif 114 115#ifdef CONFIG_SOC_HAS_REALTIME_COUNTER 116extern void omap5_realtime_timer_init(void); 117#else 118static inline void omap5_realtime_timer_init(void) 119{ 120} 121#endif 122 123void omap2420_init_early(void); 124void omap2430_init_early(void); 125void omap3430_init_early(void); 126void omap35xx_init_early(void); 127void omap3630_init_early(void); 128void omap3_init_early(void); /* Do not use this one */ 129void am33xx_init_early(void); 130void am35xx_init_early(void); 131void ti814x_init_early(void); 132void ti816x_init_early(void); 133void am43xx_init_early(void); 134void am43xx_init_late(void); 135void omap4430_init_early(void); 136void omap5_init_early(void); 137void omap3_init_late(void); 138void omap4430_init_late(void); 139void omap2420_init_late(void); 140void omap2430_init_late(void); 141void ti81xx_init_late(void); 142void am33xx_init_late(void); 143void omap5_init_late(void); 144int omap2_common_pm_late_init(void); 145void dra7xx_init_early(void); 146void dra7xx_init_late(void); 147 148#ifdef CONFIG_SOC_BUS 149void omap_soc_device_init(void); 150#else 151static inline void omap_soc_device_init(void) 152{ 153} 154#endif 155 156#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) 157void omap2xxx_restart(enum reboot_mode mode, const char *cmd); 158#else 159static inline void omap2xxx_restart(enum reboot_mode mode, const char *cmd) 160{ 161} 162#endif 163 164#ifdef CONFIG_SOC_AM33XX 165void am33xx_restart(enum reboot_mode mode, const char *cmd); 166#else 167static inline void am33xx_restart(enum reboot_mode mode, const char *cmd) 168{ 169} 170#endif 171 172#ifdef CONFIG_ARCH_OMAP3 173void omap3xxx_restart(enum reboot_mode mode, const char *cmd); 174#else 175static inline void omap3xxx_restart(enum reboot_mode mode, const char *cmd) 176{ 177} 178#endif 179 180#ifdef CONFIG_SOC_TI81XX 181void ti81xx_restart(enum reboot_mode mode, const char *cmd); 182#else 183static inline void ti81xx_restart(enum reboot_mode mode, const char *cmd) 184{ 185} 186#endif 187 188#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 189 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM43XX) 190void omap44xx_restart(enum reboot_mode mode, const char *cmd); 191#else 192static inline void omap44xx_restart(enum reboot_mode mode, const char *cmd) 193{ 194} 195#endif 196 197#ifdef CONFIG_OMAP_INTERCONNECT_BARRIER 198void omap_barrier_reserve_memblock(void); 199void omap_barriers_init(void); 200#else 201static inline void omap_barrier_reserve_memblock(void) 202{ 203} 204#endif 205 206/* This gets called from mach-omap2/io.c, do not call this */ 207void __init omap2_set_globals_tap(u32 class, void __iomem *tap); 208 209void __init omap242x_map_io(void); 210void __init omap243x_map_io(void); 211void __init omap3_map_io(void); 212void __init am33xx_map_io(void); 213void __init omap4_map_io(void); 214void __init omap5_map_io(void); 215void __init dra7xx_map_io(void); 216void __init ti81xx_map_io(void); 217 218/** 219 * omap_test_timeout - busy-loop, testing a condition 220 * @cond: condition to test until it evaluates to true 221 * @timeout: maximum number of microseconds in the timeout 222 * @index: loop index (integer) 223 * 224 * Loop waiting for @cond to become true or until at least @timeout 225 * microseconds have passed. To use, define some integer @index in the 226 * calling code. After running, if @index == @timeout, then the loop has 227 * timed out. 228 */ 229#define omap_test_timeout(cond, timeout, index) \ 230({ \ 231 for (index = 0; index < timeout; index++) { \ 232 if (cond) \ 233 break; \ 234 udelay(1); \ 235 } \ 236}) 237 238extern struct device *omap2_get_mpuss_device(void); 239extern struct device *omap2_get_iva_device(void); 240extern struct device *omap2_get_l3_device(void); 241extern struct device *omap4_get_dsp_device(void); 242 243void omap_gic_of_init(void); 244 245#ifdef CONFIG_CACHE_L2X0 246extern void __iomem *omap4_get_l2cache_base(void); 247#endif 248 249struct device_node; 250 251#ifdef CONFIG_SMP 252extern void __iomem *omap4_get_scu_base(void); 253#else 254static inline void __iomem *omap4_get_scu_base(void) 255{ 256 return NULL; 257} 258#endif 259 260extern void gic_dist_disable(void); 261extern void gic_dist_enable(void); 262extern bool gic_dist_disabled(void); 263extern void gic_timer_retrigger(void); 264extern void _omap_smc1(u32 fn, u32 arg); 265extern void omap4_sar_ram_init(void); 266extern void __iomem *omap4_get_sar_ram_base(void); 267extern void omap4_mpuss_early_init(void); 268extern void omap_do_wfi(void); 269extern void omap_interconnect_sync(void); 270 271#ifdef CONFIG_SMP 272/* Needed for secondary core boot */ 273extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); 274extern void omap_auxcoreboot_addr(u32 cpu_addr); 275extern u32 omap_read_auxcoreboot0(void); 276 277extern void omap4_cpu_die(unsigned int cpu); 278extern int omap4_cpu_kill(unsigned int cpu); 279 280extern const struct smp_operations omap4_smp_ops; 281#endif 282 283extern u32 omap4_get_cpu1_ns_pa_addr(void); 284 285#if defined(CONFIG_SMP) && defined(CONFIG_PM) 286extern int omap4_mpuss_init(void); 287extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); 288extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); 289#else 290static inline int omap4_enter_lowpower(unsigned int cpu, 291 unsigned int power_state) 292{ 293 cpu_do_idle(); 294 return 0; 295} 296 297static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state) 298{ 299 cpu_do_idle(); 300 return 0; 301} 302 303static inline int omap4_mpuss_init(void) 304{ 305 return 0; 306} 307 308#endif 309 310#ifdef CONFIG_ARCH_OMAP4 311void omap4_secondary_startup(void); 312void omap4460_secondary_startup(void); 313int omap4_finish_suspend(unsigned long cpu_state); 314void omap4_cpu_resume(void); 315#else 316static inline void omap4_secondary_startup(void) 317{ 318} 319 320static inline void omap4460_secondary_startup(void) 321{ 322} 323static inline int omap4_finish_suspend(unsigned long cpu_state) 324{ 325 return 0; 326} 327static inline void omap4_cpu_resume(void) 328{ 329} 330#endif 331 332#if defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX) 333void omap5_secondary_startup(void); 334void omap5_secondary_hyp_startup(void); 335#else 336static inline void omap5_secondary_startup(void) 337{ 338} 339 340static inline void omap5_secondary_hyp_startup(void) 341{ 342} 343#endif 344 345struct omap_system_dma_plat_info; 346 347void pdata_quirks_init(const struct of_device_id *); 348void omap_auxdata_legacy_init(struct device *dev); 349void omap_pcs_legacy_init(int irq, void (*rearm)(void)); 350extern struct omap_system_dma_plat_info dma_plat_info; 351 352struct omap_sdrc_params; 353extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0, 354 struct omap_sdrc_params *sdrc_cs1); 355extern void omap_reserve(void); 356 357struct omap_hwmod; 358extern int omap_dss_reset(struct omap_hwmod *); 359 360/* SoC specific clock initializer */ 361int omap_clk_init(void); 362 363#if IS_ENABLED(CONFIG_OMAP_IOMMU) 364int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request, 365 u8 *pwrst); 366#else 367static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, 368 bool request, u8 *pwrst) 369{ 370 return 0; 371} 372#endif 373 374#endif /* __ASSEMBLER__ */ 375#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */