cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pm.h (4298B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * OMAP2/3 Power Management Routines
      4 *
      5 * Copyright (C) 2008 Nokia Corporation
      6 * Jouni Hogander
      7 */
      8#ifndef __ARCH_ARM_MACH_OMAP2_PM_H
      9#define __ARCH_ARM_MACH_OMAP2_PM_H
     10
     11#include <linux/err.h>
     12
     13#include "powerdomain.h"
     14
     15#ifdef CONFIG_CPU_IDLE
     16extern int __init omap3_idle_init(void);
     17extern int __init omap4_idle_init(void);
     18#else
     19static inline int omap3_idle_init(void)
     20{
     21	return 0;
     22}
     23
     24static inline int omap4_idle_init(void)
     25{
     26	return 0;
     27}
     28#endif
     29
     30extern void *omap3_secure_ram_storage;
     31extern void omap3_pm_off_mode_enable(int);
     32extern void omap_sram_idle(void);
     33extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
     34
     35#if defined(CONFIG_PM_OPP)
     36extern int omap3_opp_init(void);
     37extern int omap4_opp_init(void);
     38#else
     39static inline int omap3_opp_init(void)
     40{
     41	return -EINVAL;
     42}
     43static inline int omap4_opp_init(void)
     44{
     45	return -EINVAL;
     46}
     47#endif
     48
     49extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
     50extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
     51
     52extern u32 enable_off_mode;
     53
     54#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
     55extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
     56#else
     57#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
     58#endif /* CONFIG_PM_DEBUG */
     59
     60/* 24xx */
     61extern void omap24xx_idle_loop_suspend(void);
     62extern unsigned int omap24xx_idle_loop_suspend_sz;
     63
     64extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
     65					void __iomem *sdrc_power);
     66extern unsigned int omap24xx_cpu_suspend_sz;
     67
     68/* 3xxx */
     69extern void omap34xx_cpu_suspend(int save_state);
     70
     71/* omap3_do_wfi function pointer and size, for copy to SRAM */
     72extern void omap3_do_wfi(void);
     73extern unsigned int omap3_do_wfi_sz;
     74/* ... and its pointer from SRAM after copy */
     75extern void (*omap3_do_wfi_sram)(void);
     76
     77extern struct am33xx_pm_sram_addr am33xx_pm_sram;
     78extern struct am33xx_pm_sram_addr am43xx_pm_sram;
     79
     80extern void omap3_save_scratchpad_contents(void);
     81
     82#define PM_RTA_ERRATUM_i608		(1 << 0)
     83#define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
     84#define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
     85
     86#if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
     87extern u16 pm34xx_errata;
     88#define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
     89extern void enable_omap3630_toggle_l2_on_restore(void);
     90#else
     91#define IS_PM34XX_ERRATUM(id)		0
     92static inline void enable_omap3630_toggle_l2_on_restore(void) { }
     93#endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
     94
     95#define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
     96#define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
     97
     98#if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
     99	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
    100extern u16 pm44xx_errata;
    101#define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
    102#else
    103#define IS_PM44XX_ERRATUM(id)		0
    104#endif
    105
    106#define OMAP4_VP_CONFIG_ERROROFFSET	0x00
    107#define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
    108#define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
    109#define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
    110
    111#ifdef CONFIG_POWER_AVS_OMAP
    112extern int omap_devinit_smartreflex(void);
    113extern void omap_enable_smartreflex_on_init(void);
    114#else
    115static inline int omap_devinit_smartreflex(void)
    116{
    117	return -EINVAL;
    118}
    119
    120static inline void omap_enable_smartreflex_on_init(void) {}
    121#endif
    122
    123#ifdef CONFIG_TWL4030_CORE
    124extern int omap3_twl_init(void);
    125extern int omap4_twl_init(void);
    126extern int omap3_twl_set_sr_bit(bool enable);
    127#else
    128static inline int omap3_twl_init(void)
    129{
    130	return -EINVAL;
    131}
    132static inline int omap4_twl_init(void)
    133{
    134	return -EINVAL;
    135}
    136#endif
    137
    138#if IS_ENABLED(CONFIG_MFD_CPCAP)
    139extern int omap4_cpcap_init(void);
    140#else
    141static inline int omap4_cpcap_init(void)
    142{
    143	return -EINVAL;
    144}
    145#endif
    146
    147#ifdef CONFIG_PM
    148extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
    149extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
    150extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
    151#else
    152static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
    153static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
    154static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
    155#endif
    156
    157#ifdef CONFIG_SUSPEND
    158void omap_common_suspend_init(void *pm_suspend);
    159#else
    160static inline void omap_common_suspend_init(void *pm_suspend)
    161{
    162}
    163#endif /* CONFIG_SUSPEND */
    164#endif