cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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smartreflex-class3.c (1313B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Smart reflex Class 3 specific implementations
      4 *
      5 * Author: Thara Gopinath       <thara@ti.com>
      6 *
      7 * Copyright (C) 2010 Texas Instruments, Inc.
      8 * Thara Gopinath <thara@ti.com>
      9 */
     10
     11#include <linux/power/smartreflex.h>
     12#include "soc.h"
     13#include "voltage.h"
     14
     15static int sr_class3_enable(struct omap_sr *sr)
     16{
     17	unsigned long volt = voltdm_get_voltage(sr->voltdm);
     18
     19	if (!volt) {
     20		pr_warn("%s: Curr voltage unknown. Cannot enable %s\n",
     21			__func__, sr->name);
     22		return -ENODATA;
     23	}
     24
     25	omap_vp_enable(sr->voltdm);
     26	return sr_enable(sr, volt);
     27}
     28
     29static int sr_class3_disable(struct omap_sr *sr, int is_volt_reset)
     30{
     31	sr_disable_errgen(sr);
     32	omap_vp_disable(sr->voltdm);
     33	sr_disable(sr);
     34	if (is_volt_reset)
     35		voltdm_reset(sr->voltdm);
     36
     37	return 0;
     38}
     39
     40static int sr_class3_configure(struct omap_sr *sr)
     41{
     42	return sr_configure_errgen(sr);
     43}
     44
     45/* SR class3 structure */
     46static struct omap_sr_class_data class3_data = {
     47	.enable = sr_class3_enable,
     48	.disable = sr_class3_disable,
     49	.configure = sr_class3_configure,
     50	.class_type = SR_CLASS3,
     51};
     52
     53/* Smartreflex Class3 init API to be called from board file */
     54static int __init sr_class3_init(void)
     55{
     56	pr_info("SmartReflex Class3 initialized\n");
     57	return sr_register_class(&class3_data);
     58}
     59omap_late_initcall(sr_class3_init);