cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

board-d2net.c (3052B)

      1/*
      2 * arch/arm/mach-orion5x/board-d2net.c
      3 *
      4 * LaCie d2Network and Big Disk Network NAS setup
      5 *
      6 * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com>
      7 *
      8 * This file is licensed under the terms of the GNU General Public
      9 * License version 2. This program is licensed "as is" without any
     10 * warranty of any kind, whether express or implied.
     11 */
     12
     13#include <linux/kernel.h>
     14#include <linux/init.h>
     15#include <linux/platform_device.h>
     16#include <linux/pci.h>
     17#include <linux/irq.h>
     18#include <linux/leds.h>
     19#include <linux/gpio.h>
     20#include <asm/mach-types.h>
     21#include <asm/mach/arch.h>
     22#include <asm/mach/pci.h>
     23#include <plat/orion-gpio.h>
     24#include "common.h"
     25#include "orion5x.h"
     26
     27/*****************************************************************************
     28 * LaCie d2 Network Info
     29 ****************************************************************************/
     30
     31/*****************************************************************************
     32 * GPIO LED's
     33 ****************************************************************************/
     34
     35/*
     36 * The blue front LED is wired to the CPLD and can blink in relation with the
     37 * SATA activity.
     38 *
     39 * The following array detail the different LED registers and the combination
     40 * of their possible values:
     41 *
     42 * led_off   | blink_ctrl | SATA active | LED state
     43 *           |            |             |
     44 *    1      |     x      |      x      |  off
     45 *    0      |     0      |      0      |  off
     46 *    0      |     1      |      0      |  blink (rate 300ms)
     47 *    0      |     x      |      1      |  on
     48 *
     49 * Notes: The blue and the red front LED's can't be on at the same time.
     50 *        Red LED have priority.
     51 */
     52
     53#define D2NET_GPIO_RED_LED		6
     54#define D2NET_GPIO_BLUE_LED_BLINK_CTRL	16
     55#define D2NET_GPIO_BLUE_LED_OFF		23
     56
     57static struct gpio_led d2net_leds[] = {
     58	{
     59		.name = "d2net:blue:sata",
     60		.default_trigger = "default-on",
     61		.gpio = D2NET_GPIO_BLUE_LED_OFF,
     62		.active_low = 1,
     63	},
     64	{
     65		.name = "d2net:red:fail",
     66		.gpio = D2NET_GPIO_RED_LED,
     67	},
     68};
     69
     70static struct gpio_led_platform_data d2net_led_data = {
     71	.num_leds = ARRAY_SIZE(d2net_leds),
     72	.leds = d2net_leds,
     73};
     74
     75static struct platform_device d2net_gpio_leds = {
     76	.name           = "leds-gpio",
     77	.id             = -1,
     78	.dev            = {
     79		.platform_data  = &d2net_led_data,
     80	},
     81};
     82
     83static void __init d2net_gpio_leds_init(void)
     84{
     85	int err;
     86
     87	/* Configure register blink_ctrl to allow SATA activity LED blinking. */
     88	err = gpio_request(D2NET_GPIO_BLUE_LED_BLINK_CTRL, "blue LED blink");
     89	if (err == 0) {
     90		err = gpio_direction_output(D2NET_GPIO_BLUE_LED_BLINK_CTRL, 1);
     91		if (err)
     92			gpio_free(D2NET_GPIO_BLUE_LED_BLINK_CTRL);
     93	}
     94	if (err)
     95		pr_err("d2net: failed to configure blue LED blink GPIO\n");
     96
     97	platform_device_register(&d2net_gpio_leds);
     98}
     99
    100/*****************************************************************************
    101 * General Setup
    102 ****************************************************************************/
    103
    104void __init d2net_init(void)
    105{
    106	d2net_gpio_leds_init();
    107
    108	pr_notice("d2net: Flash write are not yet supported.\n");
    109}