cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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common.h (2750B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ARCH_ORION5X_COMMON_H
      3#define __ARCH_ORION5X_COMMON_H
      4
      5#include <linux/reboot.h>
      6
      7struct dsa_chip_data;
      8struct mv643xx_eth_platform_data;
      9struct mv_sata_platform_data;
     10
     11#define ORION_MBUS_PCIE_MEM_TARGET    0x04
     12#define ORION_MBUS_PCIE_MEM_ATTR      0x59
     13#define ORION_MBUS_PCIE_IO_TARGET     0x04
     14#define ORION_MBUS_PCIE_IO_ATTR       0x51
     15#define ORION_MBUS_PCIE_WA_TARGET     0x04
     16#define ORION_MBUS_PCIE_WA_ATTR       0x79
     17#define ORION_MBUS_PCI_MEM_TARGET     0x03
     18#define ORION_MBUS_PCI_MEM_ATTR       0x59
     19#define ORION_MBUS_PCI_IO_TARGET      0x03
     20#define ORION_MBUS_PCI_IO_ATTR        0x51
     21#define ORION_MBUS_DEVBUS_BOOT_TARGET 0x01
     22#define ORION_MBUS_DEVBUS_BOOT_ATTR   0x0f
     23#define ORION_MBUS_DEVBUS_TARGET(cs)  0x01
     24#define ORION_MBUS_DEVBUS_ATTR(cs)    (~(1 << cs))
     25#define ORION_MBUS_SRAM_TARGET        0x09
     26#define ORION_MBUS_SRAM_ATTR          0x00
     27
     28/*
     29 * Basic Orion init functions used early by machine-setup.
     30 */
     31void orion5x_map_io(void);
     32void orion5x_init_early(void);
     33void orion5x_init_irq(void);
     34void orion5x_init(void);
     35void orion5x_id(u32 *dev, u32 *rev, char **dev_name);
     36void clk_init(void);
     37extern int orion5x_tclk;
     38extern void orion5x_timer_init(void);
     39
     40void orion5x_setup_wins(void);
     41
     42void orion5x_ehci0_init(void);
     43void orion5x_ehci1_init(void);
     44void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
     45void orion5x_eth_switch_init(struct dsa_chip_data *d);
     46void orion5x_i2c_init(void);
     47void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
     48void orion5x_spi_init(void);
     49void orion5x_uart0_init(void);
     50void orion5x_uart1_init(void);
     51void orion5x_xor_init(void);
     52void orion5x_restart(enum reboot_mode, const char *);
     53
     54/*
     55 * PCIe/PCI functions.
     56 */
     57struct pci_bus;
     58struct pci_host_bridge;
     59struct pci_sys_data;
     60struct pci_dev;
     61
     62void orion5x_pcie_id(u32 *dev, u32 *rev);
     63void orion5x_pci_disable(void);
     64void orion5x_pci_set_cardbus_mode(void);
     65int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys);
     66int orion5x_pci_sys_scan_bus(int nr, struct pci_host_bridge *bridge);
     67int orion5x_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
     68
     69struct tag;
     70extern void __init tag_fixup_mem32(struct tag *, char **);
     71
     72#ifdef CONFIG_MACH_MSS2_DT
     73extern void mss2_init(void);
     74#else
     75static inline void mss2_init(void) {}
     76#endif
     77
     78/*****************************************************************************
     79 * Helpers to access Orion registers
     80 ****************************************************************************/
     81/*
     82 * These are not preempt-safe.  Locks, if needed, must be taken
     83 * care of by the caller.
     84 */
     85#define orion5x_setbits(r, mask)	writel(readl(r) | (mask), (r))
     86#define orion5x_clrbits(r, mask)	writel(readl(r) & ~(mask), (r))
     87
     88#endif