cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rd88f5181l-fxo-setup.c (4881B)


      1/*
      2 * arch/arm/mach-orion5x/rd88f5181l-fxo-setup.c
      3 *
      4 * Marvell Orion-VoIP FXO Reference Design Setup
      5 *
      6 * This file is licensed under the terms of the GNU General Public
      7 * License version 2.  This program is licensed "as is" without any
      8 * warranty of any kind, whether express or implied.
      9 */
     10#include <linux/gpio.h>
     11#include <linux/kernel.h>
     12#include <linux/init.h>
     13#include <linux/platform_device.h>
     14#include <linux/pci.h>
     15#include <linux/irq.h>
     16#include <linux/mtd/physmap.h>
     17#include <linux/mv643xx_eth.h>
     18#include <linux/ethtool.h>
     19#include <linux/platform_data/dsa.h>
     20#include <asm/mach-types.h>
     21#include <asm/mach/arch.h>
     22#include <asm/mach/pci.h>
     23#include "common.h"
     24#include "mpp.h"
     25#include "orion5x.h"
     26
     27/*****************************************************************************
     28 * RD-88F5181L FXO Info
     29 ****************************************************************************/
     30/*
     31 * 8M NOR flash Device bus boot chip select
     32 */
     33#define RD88F5181L_FXO_NOR_BOOT_BASE		0xff800000
     34#define RD88F5181L_FXO_NOR_BOOT_SIZE		SZ_8M
     35
     36
     37/*****************************************************************************
     38 * 8M NOR Flash on Device bus Boot chip select
     39 ****************************************************************************/
     40static struct physmap_flash_data rd88f5181l_fxo_nor_boot_flash_data = {
     41	.width		= 1,
     42};
     43
     44static struct resource rd88f5181l_fxo_nor_boot_flash_resource = {
     45	.flags		= IORESOURCE_MEM,
     46	.start		= RD88F5181L_FXO_NOR_BOOT_BASE,
     47	.end		= RD88F5181L_FXO_NOR_BOOT_BASE +
     48			  RD88F5181L_FXO_NOR_BOOT_SIZE - 1,
     49};
     50
     51static struct platform_device rd88f5181l_fxo_nor_boot_flash = {
     52	.name			= "physmap-flash",
     53	.id			= 0,
     54	.dev		= {
     55		.platform_data	= &rd88f5181l_fxo_nor_boot_flash_data,
     56	},
     57	.num_resources		= 1,
     58	.resource		= &rd88f5181l_fxo_nor_boot_flash_resource,
     59};
     60
     61
     62/*****************************************************************************
     63 * General Setup
     64 ****************************************************************************/
     65static unsigned int rd88f5181l_fxo_mpp_modes[] __initdata = {
     66	MPP0_GPIO,		/* LED1 CardBus LED (front panel) */
     67	MPP1_GPIO,		/* PCI_intA */
     68	MPP2_GPIO,		/* Hard Reset / Factory Init*/
     69	MPP3_GPIO,		/* FXS or DAA select */
     70	MPP4_GPIO,		/* LED6 - phone LED (front panel) */
     71	MPP5_GPIO,		/* LED5 - phone LED (front panel) */
     72	MPP6_PCI_CLK,		/* CPU PCI refclk */
     73	MPP7_PCI_CLK,		/* PCI/PCIe refclk */
     74	MPP8_GPIO,		/* CardBus reset */
     75	MPP9_GPIO,		/* GE_RXERR */
     76	MPP10_GPIO,		/* LED2 MiniPCI LED (front panel) */
     77	MPP11_GPIO,		/* Lifeline control */
     78	MPP12_GIGE,		/* GE_TXD[4] */
     79	MPP13_GIGE,		/* GE_TXD[5] */
     80	MPP14_GIGE,		/* GE_TXD[6] */
     81	MPP15_GIGE,		/* GE_TXD[7] */
     82	MPP16_GIGE,		/* GE_RXD[4] */
     83	MPP17_GIGE,		/* GE_RXD[5] */
     84	MPP18_GIGE,		/* GE_RXD[6] */
     85	MPP19_GIGE,		/* GE_RXD[7] */
     86	0,
     87};
     88
     89static struct mv643xx_eth_platform_data rd88f5181l_fxo_eth_data = {
     90	.phy_addr	= MV643XX_ETH_PHY_NONE,
     91	.speed		= SPEED_1000,
     92	.duplex		= DUPLEX_FULL,
     93};
     94
     95static struct dsa_chip_data rd88f5181l_fxo_switch_chip_data = {
     96	.port_names[0]	= "lan2",
     97	.port_names[1]	= "lan1",
     98	.port_names[2]	= "wan",
     99	.port_names[3]	= "cpu",
    100	.port_names[5]	= "lan4",
    101	.port_names[7]	= "lan3",
    102};
    103
    104static void __init rd88f5181l_fxo_init(void)
    105{
    106	/*
    107	 * Setup basic Orion functions. Need to be called early.
    108	 */
    109	orion5x_init();
    110
    111	orion5x_mpp_conf(rd88f5181l_fxo_mpp_modes);
    112
    113	/*
    114	 * Configure peripherals.
    115	 */
    116	orion5x_ehci0_init();
    117	orion5x_eth_init(&rd88f5181l_fxo_eth_data);
    118	orion5x_eth_switch_init(&rd88f5181l_fxo_switch_chip_data);
    119	orion5x_uart0_init();
    120
    121	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
    122				    ORION_MBUS_DEVBUS_BOOT_ATTR,
    123				    RD88F5181L_FXO_NOR_BOOT_BASE,
    124				    RD88F5181L_FXO_NOR_BOOT_SIZE);
    125	platform_device_register(&rd88f5181l_fxo_nor_boot_flash);
    126}
    127
    128static int __init
    129rd88f5181l_fxo_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
    130{
    131	int irq;
    132
    133	/*
    134	 * Check for devices with hard-wired IRQs.
    135	 */
    136	irq = orion5x_pci_map_irq(dev, slot, pin);
    137	if (irq != -1)
    138		return irq;
    139
    140	/*
    141	 * Mini-PCI / Cardbus slot.
    142	 */
    143	return gpio_to_irq(1);
    144}
    145
    146static struct hw_pci rd88f5181l_fxo_pci __initdata = {
    147	.nr_controllers	= 2,
    148	.setup		= orion5x_pci_sys_setup,
    149	.scan		= orion5x_pci_sys_scan_bus,
    150	.map_irq	= rd88f5181l_fxo_pci_map_irq,
    151};
    152
    153static int __init rd88f5181l_fxo_pci_init(void)
    154{
    155	if (machine_is_rd88f5181l_fxo()) {
    156		orion5x_pci_set_cardbus_mode();
    157		pci_common_init(&rd88f5181l_fxo_pci);
    158	}
    159
    160	return 0;
    161}
    162subsys_initcall(rd88f5181l_fxo_pci_init);
    163
    164MACHINE_START(RD88F5181L_FXO, "Marvell Orion-VoIP FXO Reference Design")
    165	/* Maintainer: Nicolas Pitre <nico@marvell.com> */
    166	.atag_offset	= 0x100,
    167	.nr_irqs	= ORION5X_NR_IRQS,
    168	.init_machine	= rd88f5181l_fxo_init,
    169	.map_io		= orion5x_map_io,
    170	.init_early	= orion5x_init_early,
    171	.init_irq	= orion5x_init_irq,
    172	.init_time	= orion5x_timer_init,
    173	.fixup		= tag_fixup_mem32,
    174	.restart	= orion5x_restart,
    175MACHINE_END