cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rd88f6183ap-ge-setup.c (3071B)

      1/*
      2 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
      3 *
      4 * Marvell Orion-1-90 AP GE Reference Design Setup
      5 *
      6 * This file is licensed under the terms of the GNU General Public
      7 * License version 2.  This program is licensed "as is" without any
      8 * warranty of any kind, whether express or implied.
      9 */
     10#include <linux/gpio.h>
     11#include <linux/kernel.h>
     12#include <linux/init.h>
     13#include <linux/platform_device.h>
     14#include <linux/pci.h>
     15#include <linux/irq.h>
     16#include <linux/mtd/physmap.h>
     17#include <linux/mv643xx_eth.h>
     18#include <linux/spi/spi.h>
     19#include <linux/spi/flash.h>
     20#include <linux/ethtool.h>
     21#include <linux/platform_data/dsa.h>
     22#include <asm/mach-types.h>
     23#include <asm/mach/arch.h>
     24#include <asm/mach/pci.h>
     25#include "common.h"
     26#include "orion5x.h"
     27
     28static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
     29	.phy_addr	= -1,
     30	.speed		= SPEED_1000,
     31	.duplex		= DUPLEX_FULL,
     32};
     33
     34static struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = {
     35	.port_names[0]	= "lan1",
     36	.port_names[1]	= "lan2",
     37	.port_names[2]	= "lan3",
     38	.port_names[3]	= "lan4",
     39	.port_names[4]	= "wan",
     40	.port_names[5]	= "cpu",
     41};
     42
     43static struct mtd_partition rd88f6183ap_ge_partitions[] = {
     44	{
     45		.name	= "kernel",
     46		.offset	= 0x00000000,
     47		.size	= 0x00200000,
     48	}, {
     49		.name	= "rootfs",
     50		.offset	= 0x00200000,
     51		.size	= 0x00500000,
     52	}, {
     53		.name	= "nvram",
     54		.offset	= 0x00700000,
     55		.size	= 0x00080000,
     56	},
     57};
     58
     59static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
     60	.type		= "m25p64",
     61	.nr_parts	= ARRAY_SIZE(rd88f6183ap_ge_partitions),
     62	.parts		= rd88f6183ap_ge_partitions,
     63};
     64
     65static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
     66	{
     67		.modalias	= "m25p80",
     68		.platform_data	= &rd88f6183ap_ge_spi_slave_data,
     69		.max_speed_hz	= 20000000,
     70		.bus_num	= 0,
     71		.chip_select	= 0,
     72	},
     73};
     74
     75static void __init rd88f6183ap_ge_init(void)
     76{
     77	/*
     78	 * Setup basic Orion functions. Need to be called early.
     79	 */
     80	orion5x_init();
     81
     82	/*
     83	 * Configure peripherals.
     84	 */
     85	orion5x_ehci0_init();
     86	orion5x_eth_init(&rd88f6183ap_ge_eth_data);
     87	orion5x_eth_switch_init(&rd88f6183ap_ge_switch_chip_data);
     88	spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
     89				ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
     90	orion5x_spi_init();
     91	orion5x_uart0_init();
     92}
     93
     94static struct hw_pci rd88f6183ap_ge_pci __initdata = {
     95	.nr_controllers	= 2,
     96	.setup		= orion5x_pci_sys_setup,
     97	.scan		= orion5x_pci_sys_scan_bus,
     98	.map_irq	= orion5x_pci_map_irq,
     99};
    100
    101static int __init rd88f6183ap_ge_pci_init(void)
    102{
    103	if (machine_is_rd88f6183ap_ge()) {
    104		orion5x_pci_disable();
    105		pci_common_init(&rd88f6183ap_ge_pci);
    106	}
    107
    108	return 0;
    109}
    110subsys_initcall(rd88f6183ap_ge_pci_init);
    111
    112MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
    113	/* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
    114	.atag_offset	= 0x100,
    115	.nr_irqs	= ORION5X_NR_IRQS,
    116	.init_machine	= rd88f6183ap_ge_init,
    117	.map_io		= orion5x_map_io,
    118	.init_early	= orion5x_init_early,
    119	.init_irq	= orion5x_init_irq,
    120	.init_time	= orion5x_timer_init,
    121	.fixup		= tag_fixup_mem32,
    122	.restart	= orion5x_restart,
    123MACHINE_END