cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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wnr854t-setup.c (4255B)

      1/*
      2 * arch/arm/mach-orion5x/wnr854t-setup.c
      3 *
      4 * This file is licensed under the terms of the GNU General Public
      5 * License version 2.  This program is licensed "as is" without any
      6 * warranty of any kind, whether express or implied.
      7 */
      8#include <linux/gpio.h>
      9#include <linux/kernel.h>
     10#include <linux/init.h>
     11#include <linux/platform_device.h>
     12#include <linux/pci.h>
     13#include <linux/irq.h>
     14#include <linux/delay.h>
     15#include <linux/mtd/physmap.h>
     16#include <linux/mv643xx_eth.h>
     17#include <linux/ethtool.h>
     18#include <linux/platform_data/dsa.h>
     19#include <asm/mach-types.h>
     20#include <asm/mach/arch.h>
     21#include <asm/mach/pci.h>
     22#include "orion5x.h"
     23#include "common.h"
     24#include "mpp.h"
     25
     26static unsigned int wnr854t_mpp_modes[] __initdata = {
     27	MPP0_GPIO,		/* Power LED green (0=on) */
     28	MPP1_GPIO,		/* Reset Button (0=off) */
     29	MPP2_GPIO,		/* Power LED blink (0=off) */
     30	MPP3_GPIO,		/* WAN Status LED amber (0=off) */
     31	MPP4_GPIO,		/* PCI int */
     32	MPP5_GPIO,		/* ??? */
     33	MPP6_GPIO,		/* ??? */
     34	MPP7_GPIO,		/* ??? */
     35	MPP8_UNUSED,		/* ??? */
     36	MPP9_GIGE,		/* GE_RXERR */
     37	MPP10_UNUSED,		/* ??? */
     38	MPP11_UNUSED,		/* ??? */
     39	MPP12_GIGE,		/* GE_TXD[4] */
     40	MPP13_GIGE,		/* GE_TXD[5] */
     41	MPP14_GIGE,		/* GE_TXD[6] */
     42	MPP15_GIGE,		/* GE_TXD[7] */
     43	MPP16_GIGE,		/* GE_RXD[4] */
     44	MPP17_GIGE,		/* GE_RXD[5] */
     45	MPP18_GIGE,		/* GE_RXD[6] */
     46	MPP19_GIGE,		/* GE_RXD[7] */
     47	0,
     48};
     49
     50/*
     51 * 8M NOR flash Device bus boot chip select
     52 */
     53#define WNR854T_NOR_BOOT_BASE	0xf4000000
     54#define WNR854T_NOR_BOOT_SIZE	SZ_8M
     55
     56static struct mtd_partition wnr854t_nor_flash_partitions[] = {
     57	{
     58		.name		= "kernel",
     59		.offset		= 0x00000000,
     60		.size		= 0x00100000,
     61	}, {
     62		.name		= "rootfs",
     63		.offset		= 0x00100000,
     64		.size		= 0x00660000,
     65	}, {
     66		.name		= "uboot",
     67		.offset		= 0x00760000,
     68		.size		= 0x00040000,
     69	},
     70};
     71
     72static struct physmap_flash_data wnr854t_nor_flash_data = {
     73	.width		= 2,
     74	.parts		= wnr854t_nor_flash_partitions,
     75	.nr_parts	= ARRAY_SIZE(wnr854t_nor_flash_partitions),
     76};
     77
     78static struct resource wnr854t_nor_flash_resource = {
     79	.flags		= IORESOURCE_MEM,
     80	.start		= WNR854T_NOR_BOOT_BASE,
     81	.end		= WNR854T_NOR_BOOT_BASE + WNR854T_NOR_BOOT_SIZE - 1,
     82};
     83
     84static struct platform_device wnr854t_nor_flash = {
     85	.name			= "physmap-flash",
     86	.id			= 0,
     87	.dev		= {
     88		.platform_data	= &wnr854t_nor_flash_data,
     89	},
     90	.num_resources		= 1,
     91	.resource		= &wnr854t_nor_flash_resource,
     92};
     93
     94static struct mv643xx_eth_platform_data wnr854t_eth_data = {
     95	.phy_addr	= MV643XX_ETH_PHY_NONE,
     96	.speed		= SPEED_1000,
     97	.duplex		= DUPLEX_FULL,
     98};
     99
    100static struct dsa_chip_data wnr854t_switch_chip_data = {
    101	.port_names[0] = "lan3",
    102	.port_names[1] = "lan4",
    103	.port_names[2] = "wan",
    104	.port_names[3] = "cpu",
    105	.port_names[5] = "lan1",
    106	.port_names[7] = "lan2",
    107};
    108
    109static void __init wnr854t_init(void)
    110{
    111	/*
    112	 * Setup basic Orion functions. Need to be called early.
    113	 */
    114	orion5x_init();
    115
    116	orion5x_mpp_conf(wnr854t_mpp_modes);
    117
    118	/*
    119	 * Configure peripherals.
    120	 */
    121	orion5x_eth_init(&wnr854t_eth_data);
    122	orion5x_eth_switch_init(&wnr854t_switch_chip_data);
    123	orion5x_uart0_init();
    124
    125	mvebu_mbus_add_window_by_id(ORION_MBUS_DEVBUS_BOOT_TARGET,
    126				    ORION_MBUS_DEVBUS_BOOT_ATTR,
    127				    WNR854T_NOR_BOOT_BASE,
    128				    WNR854T_NOR_BOOT_SIZE);
    129	platform_device_register(&wnr854t_nor_flash);
    130}
    131
    132static int __init wnr854t_pci_map_irq(const struct pci_dev *dev, u8 slot,
    133	u8 pin)
    134{
    135	int irq;
    136
    137	/*
    138	 * Check for devices with hard-wired IRQs.
    139	 */
    140	irq = orion5x_pci_map_irq(dev, slot, pin);
    141	if (irq != -1)
    142		return irq;
    143
    144	/*
    145	 * Mini-PCI slot.
    146	 */
    147	if (slot == 7)
    148		return gpio_to_irq(4);
    149
    150	return -1;
    151}
    152
    153static struct hw_pci wnr854t_pci __initdata = {
    154	.nr_controllers	= 2,
    155	.setup		= orion5x_pci_sys_setup,
    156	.scan		= orion5x_pci_sys_scan_bus,
    157	.map_irq	= wnr854t_pci_map_irq,
    158};
    159
    160static int __init wnr854t_pci_init(void)
    161{
    162	if (machine_is_wnr854t())
    163		pci_common_init(&wnr854t_pci);
    164
    165	return 0;
    166}
    167subsys_initcall(wnr854t_pci_init);
    168
    169MACHINE_START(WNR854T, "Netgear WNR854T")
    170	/* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
    171	.atag_offset	= 0x100,
    172	.nr_irqs	= ORION5X_NR_IRQS,
    173	.init_machine	= wnr854t_init,
    174	.map_io		= orion5x_map_io,
    175	.init_early	= orion5x_init_early,
    176	.init_irq	= orion5x_init_irq,
    177	.init_time	= orion5x_timer_init,
    178	.fixup		= tag_fixup_mem32,
    179	.restart	= orion5x_restart,
    180MACHINE_END