cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

lpd270.h (1308B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * arch/arm/mach-pxa/include/mach/lpd270.h
      4 *
      5 * Author:	Lennert Buytenhek
      6 * Created:	Feb 10, 2006
      7 */
      8
      9#ifndef __ASM_ARCH_LPD270_H
     10#define __ASM_ARCH_LPD270_H
     11
     12#define LPD270_CPLD_PHYS	PXA_CS2_PHYS
     13#define LPD270_CPLD_VIRT	IOMEM(0xf0000000)
     14#define LPD270_CPLD_SIZE	0x00100000
     15
     16#define LPD270_ETH_PHYS		(PXA_CS2_PHYS + 0x01000000)
     17
     18/* CPLD registers  */
     19#define LPD270_CPLD_REG(x)	(LPD270_CPLD_VIRT + (x))
     20#define LPD270_CONTROL		LPD270_CPLD_REG(0x00)
     21#define LPD270_PERIPHERAL0	LPD270_CPLD_REG(0x04)
     22#define LPD270_PERIPHERAL1	LPD270_CPLD_REG(0x08)
     23#define LPD270_CPLD_REVISION	LPD270_CPLD_REG(0x14)
     24#define LPD270_EEPROM_SPI_ITF	LPD270_CPLD_REG(0x20)
     25#define LPD270_MODE_PINS	LPD270_CPLD_REG(0x24)
     26#define LPD270_EGPIO		LPD270_CPLD_REG(0x30)
     27#define LPD270_INT_MASK		LPD270_CPLD_REG(0x40)
     28#define LPD270_INT_STATUS	LPD270_CPLD_REG(0x50)
     29
     30#define LPD270_INT_AC97		(1 << 4)  /* AC'97 CODEC IRQ */
     31#define LPD270_INT_ETHERNET	(1 << 3)  /* Ethernet controller IRQ */
     32#define LPD270_INT_USBC		(1 << 2)  /* USB client cable detection IRQ */
     33
     34#define LPD270_IRQ(x)		(IRQ_BOARD_START + (x))
     35#define LPD270_USBC_IRQ		LPD270_IRQ(2)
     36#define LPD270_ETHERNET_IRQ	LPD270_IRQ(3)
     37#define LPD270_AC97_IRQ		LPD270_IRQ(4)
     38#define LPD270_NR_IRQS		(IRQ_BOARD_START + 5)
     39
     40#endif