cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mioa701_bootresume.S (961B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/* Bootloader to resume MIO A701
      3 *
      4 * 2007-1-12 Robert Jarzmik
      5*/
      6
      7#include <linux/linkage.h>
      8#include <asm/assembler.h>
      9
     10/*
     11 * Note: Yes, part of the following code is located into the .data section.
     12 *       This is to allow jumpaddr to be accessed with a relative load
     13 *       while we can't rely on any MMU translation.  We could have put
     14 *       sleep_save_sp in the .text section as well, but some setups might
     15 *       insist on it to be truly read-only.
     16 */
     17	.data
     18	.align	2
     19ENTRY(mioa701_bootstrap)
     200:
     21	b	1f
     22ENTRY(mioa701_jumpaddr)
     23	.word	0x40f00008		@ PSPR in no-MMU mode
     241:
     25	mov	r0,     #0xa0000000	@ Don't suppose memory access works
     26	orr	r0, r0, #0x00200000	@ even if it's supposed to
     27	orr	r0, r0, #0x0000b000
     28	mov	r1, #0
     29	str	r1, [r0]		@ Early disable resume for next boot
     30	ldr	r0, mioa701_jumpaddr	@ (Murphy's Law)
     31	ldr	r0, [r0]
     32	ret	r0
     332:
     34
     35ENTRY(mioa701_bootstrap_lg)
     36	.data
     37	.align	2
     38	.word	2b-0b