saar.c (13142B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * linux/arch/arm/mach-pxa/saar.c 4 * 5 * Support for the Marvell PXA930 Handheld Platform (aka SAAR) 6 * 7 * Copyright (C) 2007-2008 Marvell International Ltd. 8 */ 9 10#include <linux/module.h> 11#include <linux/kernel.h> 12#include <linux/interrupt.h> 13#include <linux/init.h> 14#include <linux/platform_device.h> 15#include <linux/clk.h> 16#include <linux/gpio.h> 17#include <linux/delay.h> 18#include <linux/fb.h> 19#include <linux/i2c.h> 20#include <linux/platform_data/i2c-pxa.h> 21#include <linux/smc91x.h> 22#include <linux/mfd/da903x.h> 23#include <linux/mtd/mtd.h> 24#include <linux/mtd/partitions.h> 25#include <linux/mtd/onenand.h> 26 27#include <asm/mach-types.h> 28#include <asm/mach/arch.h> 29#include <asm/mach/flash.h> 30 31#include "pxa930.h" 32#include <linux/platform_data/video-pxafb.h> 33 34#include "devices.h" 35#include "generic.h" 36 37#define GPIO_LCD_RESET (16) 38 39/* SAAR MFP configurations */ 40static mfp_cfg_t saar_mfp_cfg[] __initdata = { 41 /* LCD */ 42 GPIO23_LCD_DD0, 43 GPIO24_LCD_DD1, 44 GPIO25_LCD_DD2, 45 GPIO26_LCD_DD3, 46 GPIO27_LCD_DD4, 47 GPIO28_LCD_DD5, 48 GPIO29_LCD_DD6, 49 GPIO44_LCD_DD7, 50 GPIO21_LCD_CS, 51 GPIO22_LCD_VSYNC, 52 GPIO17_LCD_FCLK_RD, 53 GPIO18_LCD_LCLK_A0, 54 GPIO19_LCD_PCLK_WR, 55 GPIO16_GPIO, /* LCD reset */ 56 57 /* Ethernet */ 58 DF_nCS1_nCS3, 59 GPIO97_GPIO, 60 61 /* DFI */ 62 DF_INT_RnB_ND_INT_RnB, 63 DF_nRE_nOE_ND_nRE, 64 DF_nWE_ND_nWE, 65 DF_CLE_nOE_ND_CLE, 66 DF_nADV1_ALE_ND_ALE, 67 DF_nADV2_ALE_nCS3, 68 DF_nCS0_ND_nCS0, 69 DF_IO0_ND_IO0, 70 DF_IO1_ND_IO1, 71 DF_IO2_ND_IO2, 72 DF_IO3_ND_IO3, 73 DF_IO4_ND_IO4, 74 DF_IO5_ND_IO5, 75 DF_IO6_ND_IO6, 76 DF_IO7_ND_IO7, 77 DF_IO8_ND_IO8, 78 DF_IO9_ND_IO9, 79 DF_IO10_ND_IO10, 80 DF_IO11_ND_IO11, 81 DF_IO12_ND_IO12, 82 DF_IO13_ND_IO13, 83 DF_IO14_ND_IO14, 84 DF_IO15_ND_IO15, 85}; 86 87#define SAAR_ETH_PHYS (0x14000000) 88 89static struct resource smc91x_resources[] = { 90 [0] = { 91 .start = (SAAR_ETH_PHYS + 0x300), 92 .end = (SAAR_ETH_PHYS + 0xfffff), 93 .flags = IORESOURCE_MEM, 94 }, 95 [1] = { 96 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), 97 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)), 98 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 99 } 100}; 101 102static struct smc91x_platdata saar_smc91x_info = { 103 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA, 104}; 105 106static struct platform_device smc91x_device = { 107 .name = "smc91x", 108 .id = 0, 109 .num_resources = ARRAY_SIZE(smc91x_resources), 110 .resource = smc91x_resources, 111 .dev = { 112 .platform_data = &saar_smc91x_info, 113 }, 114}; 115 116#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 117static uint16_t lcd_power_on[] = { 118 /* single frame */ 119 SMART_CMD_NOOP, 120 SMART_CMD(0x00), 121 SMART_DELAY(0), 122 123 SMART_CMD_NOOP, 124 SMART_CMD(0x00), 125 SMART_DELAY(0), 126 127 SMART_CMD_NOOP, 128 SMART_CMD(0x00), 129 SMART_DELAY(0), 130 131 SMART_CMD_NOOP, 132 SMART_CMD(0x00), 133 SMART_DELAY(10), 134 135 /* calibration control */ 136 SMART_CMD(0x00), 137 SMART_CMD(0xA4), 138 SMART_DAT(0x80), 139 SMART_DAT(0x01), 140 SMART_DELAY(150), 141 142 /*Power-On Init sequence*/ 143 SMART_CMD(0x00), /* output ctrl */ 144 SMART_CMD(0x01), 145 SMART_DAT(0x01), 146 SMART_DAT(0x00), 147 SMART_CMD(0x00), /* wave ctrl */ 148 SMART_CMD(0x02), 149 SMART_DAT(0x07), 150 SMART_DAT(0x00), 151 SMART_CMD(0x00), 152 SMART_CMD(0x03), /* entry mode */ 153 SMART_DAT(0xD0), 154 SMART_DAT(0x30), 155 SMART_CMD(0x00), 156 SMART_CMD(0x08), /* display ctrl 2 */ 157 SMART_DAT(0x08), 158 SMART_DAT(0x08), 159 SMART_CMD(0x00), 160 SMART_CMD(0x09), /* display ctrl 3 */ 161 SMART_DAT(0x04), 162 SMART_DAT(0x2F), 163 SMART_CMD(0x00), 164 SMART_CMD(0x0A), /* display ctrl 4 */ 165 SMART_DAT(0x00), 166 SMART_DAT(0x08), 167 SMART_CMD(0x00), 168 SMART_CMD(0x0D), /* Frame Marker position */ 169 SMART_DAT(0x00), 170 SMART_DAT(0x08), 171 SMART_CMD(0x00), 172 SMART_CMD(0x60), /* Driver output control */ 173 SMART_DAT(0x27), 174 SMART_DAT(0x00), 175 SMART_CMD(0x00), 176 SMART_CMD(0x61), /* Base image display control */ 177 SMART_DAT(0x00), 178 SMART_DAT(0x01), 179 SMART_CMD(0x00), 180 SMART_CMD(0x30), /* Y settings 30h-3Dh */ 181 SMART_DAT(0x07), 182 SMART_DAT(0x07), 183 SMART_CMD(0x00), 184 SMART_CMD(0x31), 185 SMART_DAT(0x00), 186 SMART_DAT(0x07), 187 SMART_CMD(0x00), 188 SMART_CMD(0x32), /* Timing(3), ASW HOLD=0.5CLK */ 189 SMART_DAT(0x04), 190 SMART_DAT(0x00), 191 SMART_CMD(0x00), 192 SMART_CMD(0x33), /* Timing(4), CKV ST=0CLK, CKV ED=1CLK */ 193 SMART_DAT(0x03), 194 SMART_DAT(0x03), 195 SMART_CMD(0x00), 196 SMART_CMD(0x34), 197 SMART_DAT(0x00), 198 SMART_DAT(0x00), 199 SMART_CMD(0x00), 200 SMART_CMD(0x35), 201 SMART_DAT(0x02), 202 SMART_DAT(0x05), 203 SMART_CMD(0x00), 204 SMART_CMD(0x36), 205 SMART_DAT(0x1F), 206 SMART_DAT(0x1F), 207 SMART_CMD(0x00), 208 SMART_CMD(0x37), 209 SMART_DAT(0x07), 210 SMART_DAT(0x07), 211 SMART_CMD(0x00), 212 SMART_CMD(0x38), 213 SMART_DAT(0x00), 214 SMART_DAT(0x07), 215 SMART_CMD(0x00), 216 SMART_CMD(0x39), 217 SMART_DAT(0x04), 218 SMART_DAT(0x00), 219 SMART_CMD(0x00), 220 SMART_CMD(0x3A), 221 SMART_DAT(0x03), 222 SMART_DAT(0x03), 223 SMART_CMD(0x00), 224 SMART_CMD(0x3B), 225 SMART_DAT(0x00), 226 SMART_DAT(0x00), 227 SMART_CMD(0x00), 228 SMART_CMD(0x3C), 229 SMART_DAT(0x02), 230 SMART_DAT(0x05), 231 SMART_CMD(0x00), 232 SMART_CMD(0x3D), 233 SMART_DAT(0x1F), 234 SMART_DAT(0x1F), 235 SMART_CMD(0x00), /* Display control 1 */ 236 SMART_CMD(0x07), 237 SMART_DAT(0x00), 238 SMART_DAT(0x01), 239 SMART_CMD(0x00), /* Power control 5 */ 240 SMART_CMD(0x17), 241 SMART_DAT(0x00), 242 SMART_DAT(0x01), 243 SMART_CMD(0x00), /* Power control 1 */ 244 SMART_CMD(0x10), 245 SMART_DAT(0x10), 246 SMART_DAT(0xB0), 247 SMART_CMD(0x00), /* Power control 2 */ 248 SMART_CMD(0x11), 249 SMART_DAT(0x01), 250 SMART_DAT(0x30), 251 SMART_CMD(0x00), /* Power control 3 */ 252 SMART_CMD(0x12), 253 SMART_DAT(0x01), 254 SMART_DAT(0x9E), 255 SMART_CMD(0x00), /* Power control 4 */ 256 SMART_CMD(0x13), 257 SMART_DAT(0x17), 258 SMART_DAT(0x00), 259 SMART_CMD(0x00), /* Power control 3 */ 260 SMART_CMD(0x12), 261 SMART_DAT(0x01), 262 SMART_DAT(0xBE), 263 SMART_DELAY(100), 264 265 /* display mode : 240*320 */ 266 SMART_CMD(0x00), /* RAM address set(H) 0*/ 267 SMART_CMD(0x20), 268 SMART_DAT(0x00), 269 SMART_DAT(0x00), 270 SMART_CMD(0x00), /* RAM address set(V) 4*/ 271 SMART_CMD(0x21), 272 SMART_DAT(0x00), 273 SMART_DAT(0x00), 274 SMART_CMD(0x00), /* Start of Window RAM address set(H) 8*/ 275 SMART_CMD(0x50), 276 SMART_DAT(0x00), 277 SMART_DAT(0x00), 278 SMART_CMD(0x00), /* End of Window RAM address set(H) 12*/ 279 SMART_CMD(0x51), 280 SMART_DAT(0x00), 281 SMART_DAT(0xEF), 282 SMART_CMD(0x00), /* Start of Window RAM address set(V) 16*/ 283 SMART_CMD(0x52), 284 SMART_DAT(0x00), 285 SMART_DAT(0x00), 286 SMART_CMD(0x00), /* End of Window RAM address set(V) 20*/ 287 SMART_CMD(0x53), 288 SMART_DAT(0x01), 289 SMART_DAT(0x3F), 290 SMART_CMD(0x00), /* Panel interface control 1 */ 291 SMART_CMD(0x90), 292 SMART_DAT(0x00), 293 SMART_DAT(0x1A), 294 SMART_CMD(0x00), /* Panel interface control 2 */ 295 SMART_CMD(0x92), 296 SMART_DAT(0x04), 297 SMART_DAT(0x00), 298 SMART_CMD(0x00), /* Panel interface control 3 */ 299 SMART_CMD(0x93), 300 SMART_DAT(0x00), 301 SMART_DAT(0x05), 302 SMART_DELAY(20), 303}; 304 305static uint16_t lcd_panel_on[] = { 306 SMART_CMD(0x00), 307 SMART_CMD(0x07), 308 SMART_DAT(0x00), 309 SMART_DAT(0x21), 310 SMART_DELAY(1), 311 312 SMART_CMD(0x00), 313 SMART_CMD(0x07), 314 SMART_DAT(0x00), 315 SMART_DAT(0x61), 316 SMART_DELAY(100), 317 318 SMART_CMD(0x00), 319 SMART_CMD(0x07), 320 SMART_DAT(0x01), 321 SMART_DAT(0x73), 322 SMART_DELAY(1), 323}; 324 325static uint16_t lcd_panel_off[] = { 326 SMART_CMD(0x00), 327 SMART_CMD(0x07), 328 SMART_DAT(0x00), 329 SMART_DAT(0x72), 330 SMART_DELAY(40), 331 332 SMART_CMD(0x00), 333 SMART_CMD(0x07), 334 SMART_DAT(0x00), 335 SMART_DAT(0x01), 336 SMART_DELAY(1), 337 338 SMART_CMD(0x00), 339 SMART_CMD(0x07), 340 SMART_DAT(0x00), 341 SMART_DAT(0x00), 342 SMART_DELAY(1), 343}; 344 345static uint16_t lcd_power_off[] = { 346 SMART_CMD(0x00), 347 SMART_CMD(0x10), 348 SMART_DAT(0x00), 349 SMART_DAT(0x80), 350 351 SMART_CMD(0x00), 352 SMART_CMD(0x11), 353 SMART_DAT(0x01), 354 SMART_DAT(0x60), 355 356 SMART_CMD(0x00), 357 SMART_CMD(0x12), 358 SMART_DAT(0x01), 359 SMART_DAT(0xAE), 360 SMART_DELAY(40), 361 362 SMART_CMD(0x00), 363 SMART_CMD(0x10), 364 SMART_DAT(0x00), 365 SMART_DAT(0x00), 366}; 367 368static uint16_t update_framedata[] = { 369 /* set display ram: 240*320 */ 370 SMART_CMD(0x00), /* RAM address set(H) 0*/ 371 SMART_CMD(0x20), 372 SMART_DAT(0x00), 373 SMART_DAT(0x00), 374 SMART_CMD(0x00), /* RAM address set(V) 4*/ 375 SMART_CMD(0x21), 376 SMART_DAT(0x00), 377 SMART_DAT(0x00), 378 SMART_CMD(0x00), /* Start of Window RAM address set(H) 8 */ 379 SMART_CMD(0x50), 380 SMART_DAT(0x00), 381 SMART_DAT(0x00), 382 SMART_CMD(0x00), /* End of Window RAM address set(H) 12 */ 383 SMART_CMD(0x51), 384 SMART_DAT(0x00), 385 SMART_DAT(0xEF), 386 SMART_CMD(0x00), /* Start of Window RAM address set(V) 16 */ 387 SMART_CMD(0x52), 388 SMART_DAT(0x00), 389 SMART_DAT(0x00), 390 SMART_CMD(0x00), /* End of Window RAM address set(V) 20 */ 391 SMART_CMD(0x53), 392 SMART_DAT(0x01), 393 SMART_DAT(0x3F), 394 395 /* wait for vsync cmd before transferring frame data */ 396 SMART_CMD_WAIT_FOR_VSYNC, 397 398 /* write ram */ 399 SMART_CMD(0x00), 400 SMART_CMD(0x22), 401 402 /* write frame data */ 403 SMART_CMD_WRITE_FRAME, 404}; 405 406static void ltm022a97a_lcd_power(int on, struct fb_var_screeninfo *var) 407{ 408 static int pin_requested = 0; 409 struct fb_info *info = container_of(var, struct fb_info, var); 410 int err; 411 412 if (!pin_requested) { 413 err = gpio_request(GPIO_LCD_RESET, "lcd reset"); 414 if (err) { 415 pr_err("failed to request gpio for LCD reset\n"); 416 return; 417 } 418 419 gpio_direction_output(GPIO_LCD_RESET, 0); 420 pin_requested = 1; 421 } 422 423 if (on) { 424 gpio_set_value(GPIO_LCD_RESET, 0); msleep(100); 425 gpio_set_value(GPIO_LCD_RESET, 1); msleep(10); 426 427 pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_on)); 428 pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_on)); 429 } else { 430 pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_panel_off)); 431 pxafb_smart_queue(info, ARRAY_AND_SIZE(lcd_power_off)); 432 } 433 434 err = pxafb_smart_flush(info); 435 if (err) 436 pr_err("%s: timed out\n", __func__); 437} 438 439static void ltm022a97a_update(struct fb_info *info) 440{ 441 pxafb_smart_queue(info, ARRAY_AND_SIZE(update_framedata)); 442 pxafb_smart_flush(info); 443} 444 445static struct pxafb_mode_info toshiba_ltm022a97a_modes[] = { 446 [0] = { 447 .xres = 240, 448 .yres = 320, 449 .bpp = 16, 450 .a0csrd_set_hld = 30, 451 .a0cswr_set_hld = 30, 452 .wr_pulse_width = 30, 453 .rd_pulse_width = 30, 454 .op_hold_time = 30, 455 .cmd_inh_time = 60, 456 457 /* L_LCLK_A0 and L_LCLK_RD active low */ 458 .sync = FB_SYNC_HOR_HIGH_ACT | 459 FB_SYNC_VERT_HIGH_ACT, 460 }, 461}; 462 463static struct pxafb_mach_info saar_lcd_info = { 464 .modes = toshiba_ltm022a97a_modes, 465 .num_modes = 1, 466 .lcd_conn = LCD_SMART_PANEL_8BPP | LCD_PCLK_EDGE_FALL, 467 .pxafb_lcd_power = ltm022a97a_lcd_power, 468 .smart_update = ltm022a97a_update, 469}; 470 471static void __init saar_init_lcd(void) 472{ 473 pxa_set_fb_info(NULL, &saar_lcd_info); 474} 475#else 476static inline void saar_init_lcd(void) {} 477#endif 478 479#if defined(CONFIG_I2C_PXA) || defined(CONFIG_I2C_PXA_MODULE) 480static struct da9034_backlight_pdata saar_da9034_backlight = { 481 .output_current = 4, /* 4mA */ 482}; 483 484static struct da903x_subdev_info saar_da9034_subdevs[] = { 485 [0] = { 486 .name = "da903x-backlight", 487 .id = DA9034_ID_WLED, 488 .platform_data = &saar_da9034_backlight, 489 }, 490}; 491 492static struct da903x_platform_data saar_da9034_info = { 493 .num_subdevs = ARRAY_SIZE(saar_da9034_subdevs), 494 .subdevs = saar_da9034_subdevs, 495}; 496 497static struct i2c_board_info saar_i2c_info[] = { 498 [0] = { 499 .type = "da9034", 500 .addr = 0x34, 501 .platform_data = &saar_da9034_info, 502 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)), 503 }, 504}; 505 506static void __init saar_init_i2c(void) 507{ 508 pxa_set_i2c_info(NULL); 509 i2c_register_board_info(0, ARRAY_AND_SIZE(saar_i2c_info)); 510} 511#else 512static inline void saar_init_i2c(void) {} 513#endif 514 515#if defined(CONFIG_MTD_ONENAND) || defined(CONFIG_MTD_ONENAND_MODULE) 516static struct mtd_partition saar_onenand_partitions[] = { 517 { 518 .name = "bootloader", 519 .offset = 0, 520 .size = SZ_1M, 521 .mask_flags = MTD_WRITEABLE, 522 }, { 523 .name = "reserved", 524 .offset = MTDPART_OFS_APPEND, 525 .size = SZ_128K, 526 .mask_flags = MTD_WRITEABLE, 527 }, { 528 .name = "reserved", 529 .offset = MTDPART_OFS_APPEND, 530 .size = SZ_8M, 531 .mask_flags = MTD_WRITEABLE, 532 }, { 533 .name = "kernel", 534 .offset = MTDPART_OFS_APPEND, 535 .size = (SZ_2M + SZ_1M), 536 .mask_flags = 0, 537 }, { 538 .name = "filesystem", 539 .offset = MTDPART_OFS_APPEND, 540 .size = SZ_32M + SZ_16M, 541 .mask_flags = 0, 542 } 543}; 544 545static struct onenand_platform_data saar_onenand_info = { 546 .parts = saar_onenand_partitions, 547 .nr_parts = ARRAY_SIZE(saar_onenand_partitions), 548}; 549 550#define SMC_CS0_PHYS_BASE (0x10000000) 551 552static struct resource saar_resource_onenand[] = { 553 [0] = { 554 .start = SMC_CS0_PHYS_BASE, 555 .end = SMC_CS0_PHYS_BASE + SZ_1M, 556 .flags = IORESOURCE_MEM, 557 }, 558}; 559 560static struct platform_device saar_device_onenand = { 561 .name = "onenand-flash", 562 .id = -1, 563 .dev = { 564 .platform_data = &saar_onenand_info, 565 }, 566 .resource = saar_resource_onenand, 567 .num_resources = ARRAY_SIZE(saar_resource_onenand), 568}; 569 570static void __init saar_init_onenand(void) 571{ 572 platform_device_register(&saar_device_onenand); 573} 574#else 575static void __init saar_init_onenand(void) {} 576#endif 577 578static void __init saar_init(void) 579{ 580 /* initialize MFP configurations */ 581 pxa3xx_mfp_config(ARRAY_AND_SIZE(saar_mfp_cfg)); 582 583 pxa_set_ffuart_info(NULL); 584 pxa_set_btuart_info(NULL); 585 pxa_set_stuart_info(NULL); 586 587 platform_device_register(&smc91x_device); 588 saar_init_onenand(); 589 590 saar_init_i2c(); 591 saar_init_lcd(); 592} 593 594MACHINE_START(SAAR, "PXA930 Handheld Platform (aka SAAR)") 595 /* Maintainer: Eric Miao <eric.miao@marvell.com> */ 596 .atag_offset = 0x100, 597 .map_io = pxa3xx_map_io, 598 .nr_irqs = PXA_NR_IRQS, 599 .init_irq = pxa3xx_init_irq, 600 .handle_irq = pxa3xx_handle_irq, 601 .init_time = pxa_timer_init, 602 .init_machine = saar_init, 603 .restart = pxa_restart, 604MACHINE_END