cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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xcep.c (4601B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*  linux/arch/arm/mach-pxa/xcep.c
      3 *
      4 *  Support for the Iskratel Electronics XCEP platform as used in
      5 *  the Libera instruments from Instrumentation Technologies.
      6 *
      7 *  Author:     Ales Bardorfer <ales@i-tech.si>
      8 *  Contributions by: Abbott, MG (Michael) <michael.abbott@diamond.ac.uk>
      9 *  Contributions by: Matej Kenda <matej.kenda@i-tech.si>
     10 *  Created:    June 2006
     11 *  Copyright:  (C) 2006-2009 Instrumentation Technologies
     12 */
     13
     14#include <linux/platform_device.h>
     15#include <linux/i2c.h>
     16#include <linux/platform_data/i2c-pxa.h>
     17#include <linux/smc91x.h>
     18#include <linux/mtd/mtd.h>
     19#include <linux/mtd/partitions.h>
     20#include <linux/mtd/physmap.h>
     21
     22#include <asm/mach-types.h>
     23#include <asm/mach/arch.h>
     24#include <asm/mach/irq.h>
     25#include <asm/mach/map.h>
     26
     27#include "pxa25x.h"
     28#include "addr-map.h"
     29#include "smemc.h"
     30
     31#include "generic.h"
     32#include "devices.h"
     33
     34#define XCEP_ETH_PHYS		(PXA_CS3_PHYS + 0x00000300)
     35#define XCEP_ETH_PHYS_END	(PXA_CS3_PHYS + 0x000fffff)
     36#define XCEP_ETH_ATTR		(PXA_CS3_PHYS + 0x02000000)
     37#define XCEP_ETH_ATTR_END	(PXA_CS3_PHYS + 0x020fffff)
     38#define XCEP_ETH_IRQ		IRQ_GPIO0
     39
     40/*  XCEP CPLD base */
     41#define XCEP_CPLD_BASE		0xf0000000
     42
     43
     44/* Flash partitions. */
     45
     46static struct mtd_partition xcep_partitions[] = {
     47	{
     48		.name =		"Bootloader",
     49		.size =		0x00040000,
     50		.offset =	0,
     51		.mask_flags =	MTD_WRITEABLE
     52	}, {
     53		.name =		"Bootloader ENV",
     54		.size =		0x00040000,
     55		.offset =	0x00040000,
     56		.mask_flags =	MTD_WRITEABLE
     57	}, {
     58		.name =		"Kernel",
     59		.size =		0x00100000,
     60		.offset =	0x00080000,
     61	}, {
     62		.name =		"Rescue fs",
     63		.size =		0x00280000,
     64		.offset =	0x00180000,
     65	}, {
     66		.name =		"Filesystem",
     67		.size =		MTDPART_SIZ_FULL,
     68		.offset =	0x00400000
     69	}
     70};
     71
     72static struct physmap_flash_data xcep_flash_data[] = {
     73	{
     74		.width		= 4,		/* bankwidth in bytes */
     75		.parts		= xcep_partitions,
     76		.nr_parts	= ARRAY_SIZE(xcep_partitions)
     77	}
     78};
     79
     80static struct resource flash_resource = {
     81	.start	= PXA_CS0_PHYS,
     82	.end	= PXA_CS0_PHYS + SZ_32M - 1,
     83	.flags	= IORESOURCE_MEM,
     84};
     85
     86static struct platform_device flash_device = {
     87	.name	= "physmap-flash",
     88	.id	= 0,
     89	.dev 	= {
     90		.platform_data = xcep_flash_data,
     91	},
     92	.resource = &flash_resource,
     93	.num_resources = 1,
     94};
     95
     96
     97
     98/* SMC LAN91C111 network controller. */
     99
    100static struct resource smc91x_resources[] = {
    101	[0] = {
    102		.name	= "smc91x-regs",
    103		.start	= XCEP_ETH_PHYS,
    104		.end	= XCEP_ETH_PHYS_END,
    105		.flags	= IORESOURCE_MEM,
    106	},
    107	[1] = {
    108		.start	= XCEP_ETH_IRQ,
    109		.end	= XCEP_ETH_IRQ,
    110		.flags	= IORESOURCE_IRQ,
    111	},
    112	[2] = {
    113		.name	= "smc91x-attrib",
    114		.start	= XCEP_ETH_ATTR,
    115		.end	= XCEP_ETH_ATTR_END,
    116		.flags	= IORESOURCE_MEM,
    117	},
    118};
    119
    120static struct smc91x_platdata xcep_smc91x_info = {
    121	.flags	= SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
    122		  SMC91X_NOWAIT | SMC91X_USE_DMA,
    123};
    124
    125static struct platform_device smc91x_device = {
    126	.name		= "smc91x",
    127	.id		= -1,
    128	.num_resources	= ARRAY_SIZE(smc91x_resources),
    129	.resource	= smc91x_resources,
    130	.dev		= {
    131		.platform_data = &xcep_smc91x_info,
    132	},
    133};
    134
    135
    136static struct platform_device *devices[] __initdata = {
    137	&flash_device,
    138	&smc91x_device,
    139};
    140
    141
    142/* We have to state that there are HWMON devices on the I2C bus on XCEP.
    143 * Drivers for HWMON verify capabilities of the adapter when loading and
    144 * refuse to attach if the adapter doesn't support HWMON class of devices. */
    145static struct i2c_pxa_platform_data xcep_i2c_platform_data  = {
    146	.class = I2C_CLASS_HWMON
    147};
    148
    149
    150static mfp_cfg_t xcep_pin_config[] __initdata = {
    151	GPIO79_nCS_3,	/* SMC 91C111 chip select. */
    152	GPIO80_nCS_4,	/* CPLD chip select. */
    153	/* SSP communication to MSP430 */
    154	GPIO23_SSP1_SCLK,
    155	GPIO24_SSP1_SFRM,
    156	GPIO25_SSP1_TXD,
    157	GPIO26_SSP1_RXD,
    158	GPIO27_SSP1_EXTCLK
    159};
    160
    161static void __init xcep_init(void)
    162{
    163	pxa2xx_mfp_config(ARRAY_AND_SIZE(xcep_pin_config));
    164
    165	pxa_set_ffuart_info(NULL);
    166	pxa_set_btuart_info(NULL);
    167	pxa_set_stuart_info(NULL);
    168	pxa_set_hwuart_info(NULL);
    169
    170	/* See Intel XScale Developer's Guide for details */
    171	/* Set RDF and RDN to appropriate values (chip select 3 (smc91x)) */
    172	__raw_writel((__raw_readl(MSC1) & 0xffff) | 0xD5540000, MSC1);
    173	/* Set RDF and RDN to appropriate values (chip select 5 (fpga)) */
    174	__raw_writel((__raw_readl(MSC2) & 0xffff) | 0x72A00000, MSC2);
    175
    176	platform_add_devices(ARRAY_AND_SIZE(devices));
    177	pxa_set_i2c_info(&xcep_i2c_platform_data);
    178}
    179
    180MACHINE_START(XCEP, "Iskratel XCEP")
    181	.atag_offset	= 0x100,
    182	.init_machine	= xcep_init,
    183	.map_io		= pxa25x_map_io,
    184	.nr_irqs	= PXA_NR_IRQS,
    185	.init_irq	= pxa25x_init_irq,
    186	.handle_irq	= pxa25x_handle_irq,
    187	.init_time	= pxa_timer_init,
    188	.restart	= pxa_restart,
    189MACHINE_END
    190