cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dma-s3c24xx.h (1205B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (C) 2003-2006 Simtec Electronics
      4 *	Ben Dooks <ben@simtec.co.uk>
      5 *
      6 * Samsung S3C24XX DMA support
      7 */
      8
      9#ifndef __ASM_ARCH_DMA_H
     10#define __ASM_ARCH_DMA_H __FILE__
     11
     12#include <linux/device.h>
     13
     14/* We use `virtual` dma channels to hide the fact we have only a limited
     15 * number of DMA channels, and not of all of them (dependent on the device)
     16 * can be attached to any DMA source. We therefore let the DMA core handle
     17 * the allocation of hardware channels to clients.
     18*/
     19
     20enum dma_ch {
     21	DMACH_XD0 = 0,
     22	DMACH_XD1,
     23	DMACH_SDI,
     24	DMACH_SPI0,
     25	DMACH_SPI1,
     26	DMACH_UART0,
     27	DMACH_UART1,
     28	DMACH_UART2,
     29	DMACH_TIMER,
     30	DMACH_I2S_IN,
     31	DMACH_I2S_OUT,
     32	DMACH_PCM_IN,
     33	DMACH_PCM_OUT,
     34	DMACH_MIC_IN,
     35	DMACH_USB_EP1,
     36	DMACH_USB_EP2,
     37	DMACH_USB_EP3,
     38	DMACH_USB_EP4,
     39	DMACH_UART0_SRC2,	/* s3c2412 second uart sources */
     40	DMACH_UART1_SRC2,
     41	DMACH_UART2_SRC2,
     42	DMACH_UART3,		/* s3c2443 has extra uart */
     43	DMACH_UART3_SRC2,
     44	DMACH_SPI0_TX,		/* s3c2443/2416/2450 hsspi0 */
     45	DMACH_SPI0_RX,		/* s3c2443/2416/2450 hsspi0 */
     46	DMACH_SPI1_TX,		/* s3c2443/2450 hsspi1 */
     47	DMACH_SPI1_RX,		/* s3c2443/2450 hsspi1 */
     48	DMACH_MAX,		/* the end entry */
     49};
     50
     51#endif /* __ASM_ARCH_DMA_H */