cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-cfg.h (6289B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright 2008 Openmoko, Inc.
      4 * Copyright 2008 Simtec Electronics
      5 *	http://armlinux.simtec.co.uk/
      6 *	Ben Dooks <ben@simtec.co.uk>
      7 *
      8 * S3C Platform - GPIO pin configuration
      9 */
     10
     11/* This file contains the necessary definitions to get the basic gpio
     12 * pin configuration done such as setting a pin to input or output or
     13 * changing the pull-{up,down} configurations.
     14 */
     15
     16/* Note, this interface is being added to the s3c64xx arch first and will
     17 * be added to the s3c24xx systems later.
     18 */
     19
     20#ifndef __PLAT_GPIO_CFG_H
     21#define __PLAT_GPIO_CFG_H __FILE__
     22
     23#include <linux/types.h>
     24
     25typedef unsigned int __bitwise samsung_gpio_pull_t;
     26
     27/* forward declaration if gpio-core.h hasn't been included */
     28struct samsung_gpio_chip;
     29
     30/**
     31 * struct samsung_gpio_cfg GPIO configuration
     32 * @cfg_eint: Configuration setting when used for external interrupt source
     33 * @get_pull: Read the current pull configuration for the GPIO
     34 * @set_pull: Set the current pull configuration for the GPIO
     35 * @set_config: Set the current configuration for the GPIO
     36 * @get_config: Read the current configuration for the GPIO
     37 *
     38 * Each chip can have more than one type of GPIO bank available and some
     39 * have different capabilites even when they have the same control register
     40 * layouts. Provide an point to vector control routine and provide any
     41 * per-bank configuration information that other systems such as the
     42 * external interrupt code will need.
     43 *
     44 * @sa samsung_gpio_cfgpin
     45 * @sa s3c_gpio_getcfg
     46 * @sa s3c_gpio_setpull
     47 * @sa s3c_gpio_getpull
     48 */
     49struct samsung_gpio_cfg {
     50	unsigned int	cfg_eint;
     51
     52	samsung_gpio_pull_t	(*get_pull)(struct samsung_gpio_chip *chip, unsigned offs);
     53	int		(*set_pull)(struct samsung_gpio_chip *chip, unsigned offs,
     54				    samsung_gpio_pull_t pull);
     55
     56	unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs);
     57	int	 (*set_config)(struct samsung_gpio_chip *chip, unsigned offs,
     58			       unsigned config);
     59};
     60
     61#define S3C_GPIO_SPECIAL_MARK	(0xfffffff0)
     62#define S3C_GPIO_SPECIAL(x)	(S3C_GPIO_SPECIAL_MARK | (x))
     63
     64/* Defines for generic pin configurations */
     65#define S3C_GPIO_INPUT	(S3C_GPIO_SPECIAL(0))
     66#define S3C_GPIO_OUTPUT	(S3C_GPIO_SPECIAL(1))
     67#define S3C_GPIO_SFN(x)	(S3C_GPIO_SPECIAL(x))
     68
     69#define samsung_gpio_is_cfg_special(_cfg) \
     70	(((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
     71
     72/**
     73 * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
     74 * @pin pin The pin number to configure.
     75 * @to to The configuration for the pin's function.
     76 *
     77 * Configure which function is actually connected to the external
     78 * pin, such as an gpio input, output or some form of special function
     79 * connected to an internal peripheral block.
     80 *
     81 * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
     82 * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
     83 * will then generate the correct bit mask and shift for the configuration.
     84 *
     85 * If a bank of GPIOs all needs to be set to special-function 2, then
     86 * the following code will work:
     87 *
     88 *	for (gpio = start; gpio < end; gpio++)
     89 *		s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
     90 *
     91 * The @to parameter can also be a specific value already shifted to the
     92 * correct position in the control register, although these are discouraged
     93 * in newer kernels and are only being kept for compatibility.
     94 */
     95extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
     96
     97/**
     98 * s3c_gpio_getcfg - Read the current function for a GPIO pin
     99 * @pin: The pin to read the configuration value for.
    100 *
    101 * Read the configuration state of the given @pin, returning a value that
    102 * could be passed back to s3c_gpio_cfgpin().
    103 *
    104 * @sa s3c_gpio_cfgpin
    105 */
    106extern unsigned s3c_gpio_getcfg(unsigned int pin);
    107
    108/**
    109 * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
    110 * @start: The pin number to start at
    111 * @nr: The number of pins to configure from @start.
    112 * @cfg: The configuration for the pin's function
    113 *
    114 * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
    115 *
    116 * @sa s3c_gpio_cfgpin.
    117 */
    118extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
    119				 unsigned int cfg);
    120
    121/* Define values for the pull-{up,down} available for each gpio pin.
    122 *
    123 * These values control the state of the weak pull-{up,down} resistors
    124 * available on most pins on the S3C series. Not all chips support both
    125 * up or down settings, and it may be dependent on the chip that is being
    126 * used to whether the particular mode is available.
    127 */
    128#define S3C_GPIO_PULL_NONE	((__force samsung_gpio_pull_t)0x00)
    129#define S3C_GPIO_PULL_DOWN	((__force samsung_gpio_pull_t)0x01)
    130#define S3C_GPIO_PULL_UP	((__force samsung_gpio_pull_t)0x02)
    131
    132/**
    133 * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
    134 * @pin: The pin number to configure the pull resistor.
    135 * @pull: The configuration for the pull resistor.
    136 *
    137 * This function sets the state of the pull-{up,down} resistor for the
    138 * specified pin. It will return 0 if successful, or a negative error
    139 * code if the pin cannot support the requested pull setting.
    140 *
    141 * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
    142*/
    143extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull);
    144
    145/**
    146 * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
    147 * @pin: The pin number to get the settings for
    148 *
    149 * Read the pull resistor value for the specified pin.
    150*/
    151extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
    152
    153/* configure `all` aspects of an gpio */
    154
    155/**
    156 * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull.
    157 * @start: The gpio number to start at.
    158 * @nr: The number of gpio to configure from @start.
    159 * @cfg: The configuration to use
    160 * @pull: The pull setting to use.
    161 *
    162 * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting
    163 * @gpio and running for @size.
    164 *
    165 * @sa s3c_gpio_cfgpin
    166 * @sa s3c_gpio_setpull
    167 * @sa s3c_gpio_cfgpin_range
    168 */
    169extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr,
    170				 unsigned int cfg, samsung_gpio_pull_t pull);
    171
    172static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
    173					   unsigned int cfg)
    174{
    175	return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
    176}
    177
    178#endif /* __PLAT_GPIO_CFG_H */