cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-samsung-s3c64xx.h (3481B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright 2008 Openmoko, Inc.
      4 * Copyright 2008 Simtec Electronics
      5 *	http://armlinux.simtec.co.uk/
      6 *	Ben Dooks <ben@simtec.co.uk>
      7 *
      8 * S3C6400 - GPIO lib support
      9 */
     10
     11#ifndef GPIO_SAMSUNG_S3C64XX_H
     12#define GPIO_SAMSUNG_S3C64XX_H
     13
     14#ifdef CONFIG_GPIO_SAMSUNG
     15
     16/* GPIO bank sizes */
     17#define S3C64XX_GPIO_A_NR	(8)
     18#define S3C64XX_GPIO_B_NR	(7)
     19#define S3C64XX_GPIO_C_NR	(8)
     20#define S3C64XX_GPIO_D_NR	(5)
     21#define S3C64XX_GPIO_E_NR	(5)
     22#define S3C64XX_GPIO_F_NR	(16)
     23#define S3C64XX_GPIO_G_NR	(7)
     24#define S3C64XX_GPIO_H_NR	(10)
     25#define S3C64XX_GPIO_I_NR	(16)
     26#define S3C64XX_GPIO_J_NR	(12)
     27#define S3C64XX_GPIO_K_NR	(16)
     28#define S3C64XX_GPIO_L_NR	(15)
     29#define S3C64XX_GPIO_M_NR	(6)
     30#define S3C64XX_GPIO_N_NR	(16)
     31#define S3C64XX_GPIO_O_NR	(16)
     32#define S3C64XX_GPIO_P_NR	(15)
     33#define S3C64XX_GPIO_Q_NR	(9)
     34
     35/* GPIO bank numbes */
     36
     37/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
     38 * space for debugging purposes so that any accidental
     39 * change from one gpio bank to another can be caught.
     40*/
     41
     42#define S3C64XX_GPIO_NEXT(__gpio) \
     43	((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
     44
     45enum s3c_gpio_number {
     46	S3C64XX_GPIO_A_START = 0,
     47	S3C64XX_GPIO_B_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_A),
     48	S3C64XX_GPIO_C_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_B),
     49	S3C64XX_GPIO_D_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_C),
     50	S3C64XX_GPIO_E_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_D),
     51	S3C64XX_GPIO_F_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_E),
     52	S3C64XX_GPIO_G_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_F),
     53	S3C64XX_GPIO_H_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_G),
     54	S3C64XX_GPIO_I_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_H),
     55	S3C64XX_GPIO_J_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_I),
     56	S3C64XX_GPIO_K_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_J),
     57	S3C64XX_GPIO_L_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_K),
     58	S3C64XX_GPIO_M_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_L),
     59	S3C64XX_GPIO_N_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_M),
     60	S3C64XX_GPIO_O_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_N),
     61	S3C64XX_GPIO_P_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_O),
     62	S3C64XX_GPIO_Q_START = S3C64XX_GPIO_NEXT(S3C64XX_GPIO_P),
     63};
     64
     65/* S3C64XX GPIO number definitions. */
     66
     67#define S3C64XX_GPA(_nr)	(S3C64XX_GPIO_A_START + (_nr))
     68#define S3C64XX_GPB(_nr)	(S3C64XX_GPIO_B_START + (_nr))
     69#define S3C64XX_GPC(_nr)	(S3C64XX_GPIO_C_START + (_nr))
     70#define S3C64XX_GPD(_nr)	(S3C64XX_GPIO_D_START + (_nr))
     71#define S3C64XX_GPE(_nr)	(S3C64XX_GPIO_E_START + (_nr))
     72#define S3C64XX_GPF(_nr)	(S3C64XX_GPIO_F_START + (_nr))
     73#define S3C64XX_GPG(_nr)	(S3C64XX_GPIO_G_START + (_nr))
     74#define S3C64XX_GPH(_nr)	(S3C64XX_GPIO_H_START + (_nr))
     75#define S3C64XX_GPI(_nr)	(S3C64XX_GPIO_I_START + (_nr))
     76#define S3C64XX_GPJ(_nr)	(S3C64XX_GPIO_J_START + (_nr))
     77#define S3C64XX_GPK(_nr)	(S3C64XX_GPIO_K_START + (_nr))
     78#define S3C64XX_GPL(_nr)	(S3C64XX_GPIO_L_START + (_nr))
     79#define S3C64XX_GPM(_nr)	(S3C64XX_GPIO_M_START + (_nr))
     80#define S3C64XX_GPN(_nr)	(S3C64XX_GPIO_N_START + (_nr))
     81#define S3C64XX_GPO(_nr)	(S3C64XX_GPIO_O_START + (_nr))
     82#define S3C64XX_GPP(_nr)	(S3C64XX_GPIO_P_START + (_nr))
     83#define S3C64XX_GPQ(_nr)	(S3C64XX_GPIO_Q_START + (_nr))
     84
     85/* the end of the S3C64XX specific gpios */
     86#define S3C64XX_GPIO_END	(S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
     87#define S3C_GPIO_END		S3C64XX_GPIO_END
     88
     89/* define the number of gpios we need to the one after the GPQ() range */
     90#define GPIO_BOARD_START (S3C64XX_GPQ(S3C64XX_GPIO_Q_NR) + 1)
     91
     92#endif /* GPIO_SAMSUNG */
     93#endif /* GPIO_SAMSUNG_S3C64XX_H */
     94