cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mach-ncp.c (2210B)

      1// SPDX-License-Identifier: GPL-2.0
      2//
      3// Copyright (C) 2008-2009 Samsung Electronics
      4
      5#include <linux/kernel.h>
      6#include <linux/types.h>
      7#include <linux/interrupt.h>
      8#include <linux/list.h>
      9#include <linux/timer.h>
     10#include <linux/init.h>
     11#include <linux/serial_core.h>
     12#include <linux/serial_s3c.h>
     13#include <linux/platform_device.h>
     14#include <linux/io.h>
     15#include <linux/i2c.h>
     16#include <linux/fb.h>
     17#include <linux/gpio.h>
     18#include <linux/delay.h>
     19
     20#include <video/platform_lcd.h>
     21#include <video/samsung_fimd.h>
     22
     23#include <asm/mach/arch.h>
     24#include <asm/mach/map.h>
     25#include <asm/mach/irq.h>
     26
     27#include "irqs.h"
     28#include "map.h"
     29
     30#include <asm/irq.h>
     31#include <asm/mach-types.h>
     32
     33#include <linux/platform_data/i2c-s3c2410.h>
     34#include "fb.h"
     35
     36#include "devs.h"
     37#include "cpu.h"
     38
     39#include "s3c64xx.h"
     40
     41#define UCON S3C2410_UCON_DEFAULT
     42#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
     43#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
     44
     45static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
     46	/* REVISIT: NCP uses only serial 1, 2 */
     47	[0] = {
     48		.hwport	     = 0,
     49		.flags	     = 0,
     50		.ucon	     = UCON,
     51		.ulcon	     = ULCON,
     52		.ufcon	     = UFCON,
     53	},
     54	[1] = {
     55		.hwport	     = 1,
     56		.flags	     = 0,
     57		.ucon	     = UCON,
     58		.ulcon	     = ULCON,
     59		.ufcon	     = UFCON,
     60	},
     61	[2] = {
     62		.hwport	     = 2,
     63		.flags	     = 0,
     64		.ucon	     = UCON,
     65		.ulcon	     = ULCON,
     66		.ufcon	     = UFCON,
     67	},
     68};
     69
     70static struct platform_device *ncp_devices[] __initdata = {
     71	&s3c_device_hsmmc1,
     72	&s3c_device_i2c0,
     73};
     74
     75static struct map_desc ncp_iodesc[] __initdata = {};
     76
     77static void __init ncp_map_io(void)
     78{
     79	s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
     80	s3c64xx_set_xtal_freq(12000000);
     81	s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
     82	s3c64xx_set_timer_source(S3C64XX_PWM3, S3C64XX_PWM4);
     83}
     84
     85static void __init ncp_machine_init(void)
     86{
     87	s3c_i2c0_set_platdata(NULL);
     88
     89	platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
     90}
     91
     92MACHINE_START(NCP, "NCP")
     93	/* Maintainer: Samsung Electronics */
     94	.atag_offset	= 0x100,
     95	.nr_irqs	= S3C64XX_NR_IRQS,
     96	.init_irq	= s3c6410_init_irq,
     97	.map_io		= ncp_map_io,
     98	.init_machine	= ncp_machine_init,
     99	.init_time	= s3c64xx_timer_init,
    100MACHINE_END