cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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map-s3c.h (1842B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2008 Simtec Electronics
      4 *	Ben Dooks <ben@simtec.co.uk>
      5 *
      6 * S3C24XX - Memory map definitions
      7 */
      8
      9#ifndef __ASM_PLAT_MAP_S3C_H
     10#define __ASM_PLAT_MAP_S3C_H __FILE__
     11
     12#include "map.h"
     13
     14#define S3C24XX_VA_IRQ		S3C_VA_IRQ
     15#define S3C24XX_VA_MEMCTRL	S3C_VA_MEM
     16#define S3C24XX_VA_UART		S3C_VA_UART
     17
     18#define S3C24XX_VA_TIMER	S3C_VA_TIMER
     19#define S3C24XX_VA_CLKPWR	S3C_VA_SYS
     20#define S3C24XX_VA_WATCHDOG	S3C_VA_WATCHDOG
     21
     22#define S3C2412_VA_SSMC		S3C_ADDR_CPU(0x00000000)
     23#define S3C2412_VA_EBI		S3C_ADDR_CPU(0x00100000)
     24
     25#define S3C2410_PA_UART		(0x50000000)
     26#define S3C24XX_PA_UART		S3C2410_PA_UART
     27
     28/*
     29 * GPIO ports
     30 *
     31 * the calculation for the VA of this must ensure that
     32 * it is the same distance apart from the UART in the
     33 * phsyical address space, as the initial mapping for the IO
     34 * is done as a 1:1 mapping. This puts it (currently) at
     35 * 0xFA800000, which is not in the way of any current mapping
     36 * by the base system.
     37*/
     38
     39#define S3C2410_PA_GPIO		(0x56000000)
     40#define S3C24XX_PA_GPIO		S3C2410_PA_GPIO
     41
     42#define S3C24XX_VA_GPIO		((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART)
     43#define S3C64XX_VA_GPIO		S3C_ADDR_CPU(0x00000000)
     44
     45#define S3C64XX_VA_MODEM	S3C_ADDR_CPU(0x00100000)
     46#define S3C64XX_VA_USB_HSPHY	S3C_ADDR_CPU(0x00200000)
     47
     48#define S3C_VA_USB_HSPHY	S3C64XX_VA_USB_HSPHY
     49
     50#define S3C2410_ADDR(x)		S3C_ADDR(x)
     51
     52/* deal with the registers that move under the 2412/2413 */
     53
     54#if defined(CONFIG_CPU_S3C2412)
     55#ifndef __ASSEMBLY__
     56extern void __iomem *s3c24xx_va_gpio2;
     57#endif
     58#ifdef CONFIG_CPU_S3C2412_ONLY
     59#define S3C24XX_VA_GPIO2	(S3C24XX_VA_GPIO + 0x10)
     60#else
     61#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2
     62#endif
     63#else
     64#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO
     65#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO
     66#endif
     67
     68#include "map-s5p.h"
     69
     70#endif /* __ASM_PLAT_MAP_S3C_H */