cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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s3c24xx.h (3355B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
      4 *		http://www.samsung.com
      5 *
      6 * Common Header for S3C24XX SoCs
      7 */
      8
      9#ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H
     10#define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__
     11
     12#include <linux/reboot.h>
     13#include "irqs.h"
     14
     15struct s3c2410_uartcfg;
     16
     17#ifdef CONFIG_CPU_S3C2410
     18extern  int s3c2410_init(void);
     19extern  int s3c2410a_init(void);
     20extern void s3c2410_map_io(void);
     21extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no);
     22extern void s3c2410_init_clocks(int xtal);
     23extern void s3c2410_init_irq(void);
     24#else
     25#define s3c2410_init_clocks NULL
     26#define s3c2410_init_uarts NULL
     27#define s3c2410_map_io NULL
     28#define s3c2410_init NULL
     29#define s3c2410a_init NULL
     30#endif
     31
     32#ifdef CONFIG_CPU_S3C2412
     33extern  int s3c2412_init(void);
     34extern void s3c2412_map_io(void);
     35extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no);
     36extern void s3c2412_init_clocks(int xtal);
     37extern  int s3c2412_baseclk_add(void);
     38extern void s3c2412_init_irq(void);
     39#else
     40#define s3c2412_init_clocks NULL
     41#define s3c2412_init_uarts NULL
     42#define s3c2412_map_io NULL
     43#define s3c2412_init NULL
     44#endif
     45
     46#ifdef CONFIG_CPU_S3C2416
     47extern  int s3c2416_init(void);
     48extern void s3c2416_map_io(void);
     49extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no);
     50extern void s3c2416_init_clocks(int xtal);
     51extern  int s3c2416_baseclk_add(void);
     52extern void s3c2416_init_irq(void);
     53
     54extern struct syscore_ops s3c2416_irq_syscore_ops;
     55#else
     56#define s3c2416_init_clocks NULL
     57#define s3c2416_init_uarts NULL
     58#define s3c2416_map_io NULL
     59#define s3c2416_init NULL
     60#endif
     61
     62#if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442)
     63extern void s3c244x_map_io(void);
     64extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no);
     65#else
     66#define s3c244x_init_uarts NULL
     67#endif
     68
     69#ifdef CONFIG_CPU_S3C2440
     70extern  int s3c2440_init(void);
     71extern void s3c2440_map_io(void);
     72extern void s3c2440_init_clocks(int xtal);
     73extern void s3c2440_init_irq(void);
     74#else
     75#define s3c2440_init NULL
     76#define s3c2440_map_io NULL
     77#endif
     78
     79#ifdef CONFIG_CPU_S3C2442
     80extern  int s3c2442_init(void);
     81extern void s3c2442_map_io(void);
     82extern void s3c2442_init_clocks(int xtal);
     83extern void s3c2442_init_irq(void);
     84#else
     85#define s3c2442_init NULL
     86#define s3c2442_map_io NULL
     87#endif
     88
     89#ifdef CONFIG_CPU_S3C2443
     90extern  int s3c2443_init(void);
     91extern void s3c2443_map_io(void);
     92extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no);
     93extern void s3c2443_init_clocks(int xtal);
     94extern  int s3c2443_baseclk_add(void);
     95extern void s3c2443_init_irq(void);
     96#else
     97#define s3c2443_init_clocks NULL
     98#define s3c2443_init_uarts NULL
     99#define s3c2443_map_io NULL
    100#define s3c2443_init NULL
    101#endif
    102
    103extern struct syscore_ops s3c24xx_irq_syscore_ops;
    104
    105extern struct platform_device s3c2410_device_dma;
    106extern struct platform_device s3c2412_device_dma;
    107extern struct platform_device s3c2440_device_dma;
    108extern struct platform_device s3c2443_device_dma;
    109
    110extern struct platform_device s3c2410_device_dclk;
    111
    112enum s3c24xx_timer_mode {
    113	S3C24XX_PWM0,
    114	S3C24XX_PWM1,
    115	S3C24XX_PWM2,
    116	S3C24XX_PWM3,
    117	S3C24XX_PWM4,
    118};
    119
    120extern void __init s3c24xx_set_timer_source(enum s3c24xx_timer_mode event,
    121					    enum s3c24xx_timer_mode source);
    122extern void __init s3c24xx_timer_init(void);
    123
    124#endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */